CDCM1802RGTR datasheet(5/30 Pages) TI1

部件名	CDCM1802RGTR

功能描述	CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

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制造商	TI1 [Texas Instruments]

网页	http://www.ti.com

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CDCM1802

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SCAS759B – APRIL 2004 – REVISED NOVEMBER 2015

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

LVPECL INPUT IN, IN

fclk

Input frequency

0

800

MHz

VCM

High-level input common mode

1

VDD − 0.3

V

See (1)

500

1300

VIN

Input voltage swing between IN and IN

mV

See (2)

150

1300

IIN

Input current

VI = VDD or 0 V

±10

µA

RIN

Input impedance

300

k

Ω

CI

Input capacitance at IN, IN

1

pF

LVPECL OUTPUT DRIVER Y0, Y0

fclk

Output frequency (see Figure 3)

0

800

MHz

VOH

High-level output voltage

Termination with 50

Ω to VDD − 2 V

VDD − 1.18

VDD – 0.81

V

VOL

Low-level output voltage

Termination with 50

Ω to VDD − 2 V

VDD − 1.98

VDD – 1.55

V

Output voltage swing between Y and Y

VO

Termination with 50

Ω to VDD − 2 V

500

mV

(see Figure 3)

IOZL

VDD = 3.6 V, VO = 0 V

5

µA

Output 3-state

IOZH

VDD = 3.6 V, VO = VDD – 0.8 V

10

µA

CO

Output capacitance

VO = VDD or GND

1

pF

LOAD

Expected output load

50

Ω

LVCMOS OUTPUT PARAMETER, Y1

fclk

Output frequency(3) (see Figure 4)

0

200

MHz

VDD = min to max, IOH = −100 µA

VDD – 0.1

VOH

High-level output voltage

VDD = 3 V, IOH = −6 mA

2.4

V

VDD = 3 V, IOH = −12 mA

2

VDD = min to max, IOL = 100 µA

0.1

VOL

Low-level output voltage

VDD = 3 V, IOL = 6 mA

0.5

V

VDD = 3 V, IOL = 12 mA

0.8

IOH

High-level output current

VDD = 3.3 V, VO = 1.65 V

−29

mA

IOL

Low-level output current

VDD = 3.3 V, VO = 1.65 V

37

mA

IOZ

High-impedance state output current

VDD = 3.6 V, VO = VDD or 0 V

±5

µA

CO

Output capacitance

VDD = 3.3 V

2

pF

Load

Expected output loading (see Figure 9)

10

pF

(1)

Required to maintain AC specifications

(2)

Required to maintain device functionality

(3)

Operating the CDCM1802 LVCMOS output above the maximum frequency will not cause a malfunction to the device, but the Y1 output

signal swing will not achieve enough signal swing to meet the output specification. Therefore, the CDCM1802 can be operated at higher

frequencies, while the LVCMOS output Y1 becomes unusable.

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