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DP83847 数据表(PDF) 53 Page - National Semiconductor (TI) |
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DP83847 数据表(HTML) 53 Page - National Semiconductor (TI) |
53 / 60 page 53 www.national.com 6.5.3 10BASE-T Transmit Timing (Start of Packet) 6.5.4 10BASE-T Transmit Timing (End of Packet) Parameter Description Notes Min Typ Max Units T5.3.1 Transmit Enable Setup Time from the Falling Edge of TX_CLK 25 ns T5.3.2 Transmit Data Setup Time from the Falling Edge of TX_CLK 25 ns T5.3.3 Transmit Data Hold Time from the Falling Edge of TX_CLK 5ns T5.3.4 Transmit Output Delay from the Falling Edge of TX_CLK 6.8 bit times TX_CLK TX_EN TXD[0] TPTD ± T5.3.1 T5.3.2 T5.3.3 T5.3.4 Parameter Description Notes Min Typ Max Units T5.4.1 Transmit Enable Hold Time from the Falling Edge of TX_CLK 5ns T5.4.2 End of Packet High Time (with ‘0’ ending bit) 250 ns T5.4.3 End of Packet High Time (with ‘1’ ending bit) 250 ns TX_CLK TX_EN TPTD ± 00 11 TPTD ± T5.4.2 T5.4.3 T5.4.1 |
类似零件编号 - DP83847 |
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类似说明 - DP83847 |
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