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74LVC1G80GM 数据表(PDF) 9 Page - Panasonic Semiconductor |
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74LVC1G80GM 数据表(HTML) 9 Page - Panasonic Semiconductor |
9 / 18 page 2004 Sep 10 9 Philips Semiconductors Product specification Single D-type flip-flop; positive-edge trigger 74LVC1G80 AC CHARACTERISTICS GND = 0 V. SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT WAVEFORMS VCC (V) Tamb = −40 °C to +85 °C; note 1 tPHL/tPLH propagation delay CP to Q see Figs 6 and 8 1.65 to 1.95 1.0 3.4 9.9 ns 2.3 to 2.7 0.5 2.3 7.0 ns 2.7 0.5 2.5 6.0 ns 3.0 to 3.6 0.9 2.4 5.0 ns 4.5 to 5.5 0.5 1.8 4.5 ns tsu set-up time D to CP see Figs 7 and 8 1.65 to 1.95 2.3 0.8 − ns 2.3 to 2.7 1.5 0.6 − ns 2.7 1.5 0.5 − ns 3.0 to 3.6 1.3 0.4 − ns 4.5 to 5.5 1.1 0.5 − ns th hold time D to CP see Figs 7 and 8 1.65 to 1.95 0 −0.6 − ns 2.3 to 2.7 0 −0.4 − ns 2.7 +0.5 −0.2 − ns 3.0 to 3.6 0.9 0.2 − ns 4.5 to 5.5 +0.5 −0.1 − ns tW clock pulse with HIGH or LOW see Figs 7 and 8 1.65 to 1.95 3.0 1.1 − ns 2.3 to 2.7 2.5 0.7 − ns 2.7 2.5 0.6 − ns 3.0 to 3.6 2.5 0.6 − ns 4.5 to 5.5 2.0 0.5 − ns fmax maximum clock pulse frequency see Figs 7 and 8 1.65 to 1.95 160 300 − MHz 2.3 to 2.7 160 350 − MHz 2.7 160 350 − MHz 3.0 to 3.6 160 350 − MHz 4.5 to 5.5 200 400 − MHz |
类似零件编号 - 74LVC1G80GM |
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类似说明 - 74LVC1G80GM |
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