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DAC5686 数据表(PDF) 1 Page - Texas Instruments |
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DAC5686 数据表(HTML) 1 Page - Texas Instruments |
1 / 53 page 1 FEATURES APPLICATIONS DESCRIPTION DAC5686 www.ti.com ............................................................................................................................................................ SLWS147F – APRIL 2003 – REVISED JUNE 2009 16-BIT, 500-MSPS, 2×–16× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER • 1.8-V Digital and 3.3-V Analog Supplies 234 • 500-MSPS Maximum-Update-Rate DAC • 1.8-V/3.3-V CMOS-Compatible Interface • WCDMA ACPR • Power Dissipation: 950 mW at Full Maximum Operating Conditions – 1 Carrier: 76 dB Centered at 30.72-MHz IF, 245.76 MSPS • Package: 100-Pin HTQFP – 1 Carrier: 73 dB Centered at 61.44-MHz IF, 245.76 MSPS • Cellular Base Transceiver Station Transmit – 2 Carrier: 72 dB Centered at 30.72-MHz IF, Channel 245.76 MSPS – CDMA: W-CDMA, CDMA2000, IS-95 – 4 Carrier: 64 dB Centered at 92.16-MHz IF, – TDMA: GSM, IS-136, EDGE/UWC-136 491.52 MSPS • Baseband I and Q Transmit • Selectable 2×, 4×, 8×, and 16× Interpolation • Input Interface: Quadrature Modulation for – Linear Phase Interfacing With Baseband Complex Mixing – 0.05-dB Pass-Band Ripple ASICs – 80-dB Stop-Band Attenuation • Single-Sideband Up-Conversion • Diversity Transmit – Stop-Band Transition 0.4–0.6 fDATA • Cable Modem Termination System • 32-Bit Programmable NCO • On-Chip 2×–16× PLL Clock Multiplier With Bypass Mode • Differential Scalable Current Outputs: 2 mA to 20 mA • On-Chip 1.2-V Reference The DAC5686 is a dual-channel 16-bit high-speed digital-to-analog converter (DAC) with integrated 2×, 4×, 8×, and 16× interpolation filters, a numerically controlled oscillator (NCO), onboard clock multiplier, and on-chip voltage reference. The DAC5686 has been specifically designed to allow for low input data rates between the DAC and ASIC, or FPGA, and high output transmit intermediate frequencies (IF). Target applications include high-speed digital data transmission in wired and wireless communication systems and high-frequency direct-digital synthesis DDS. The DAC5686 provides three modes of operation: dual-channel, single-sideband, and quadrature modulation. In dual-channel mode, interpolation filtering increases the DAC update rate, which reduces sinx/x rolloff and enables the use of relaxed analog post-filtering. Single-sideband mode provides an alternative interface to the analog quadrature modulators. Channel carrier selection is performed at baseband by mixing in the ASIC/FPGA. Baseband I and Q from the ASIC/FPGA are input to the DAC5686, which in turn performs a complex mix resulting in Hilbert transform pairs at the outputs of the DAC5686's two DACs. An external RF quadrature modulator then performs the final single-sideband up-conversion. The DAC5686's complex mixing frequencies are flexibly chosen with the 32-bit programmable NCO. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 PowerPAD is a trademark of Texas Instruments. 3 Excel is a trademark of Microsoft Corporation. 4 All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2009, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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类似说明 - DAC5686 |
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