数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

CD74AC112M96G4 数据表(PDF) 3 Page - Texas Instruments

部件名 CD74AC112M96G4
功能描述  DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
Download  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

CD74AC112M96G4 数据表(HTML) 3 Page - Texas Instruments

  CD74AC112M96G4 Datasheet HTML 1Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 2Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 3Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 4Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 5Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 6Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 7Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 8Page - Texas Instruments CD74AC112M96G4 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 15 page
background image
CD54AC112, CD74AC112
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCHS325 – JANUARY 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
TA = 25°C
–55
°C to
125
°C
–40
°C to
85
°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
VCC
Supply voltage
1.5
5.5
1.5
5.5
1.5
5.5
V
VCC = 1.5 V
1.2
1.2
1.2
VIH
High-level input voltage
VCC = 3 V
2.1
2.1
2.1
V
VCC = 5.5 V
3.85
3.85
3.85
VCC = 1.5 V
0.3
0.3
0.3
VIL
Low-level input voltage
VCC = 3 V
0.9
0.9
0.9
V
VCC = 5.5 V
1.65
1.65
1.65
VI
Input voltage
0
VCC
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
IOH
High-level output current
VCC = 4.5 V to 5.5 V
–24
–24
–24
mA
IOL
Low-level output current
VCC = 4.5 V to 5.5 V
24
24
24
mA
∆t/∆v
Input transition rise or fall rate
VCC = 1.5 V to 3 V
50
50
50
ns/V
∆t/∆v
Input transition rise or fall rate
VCC = 3.6 V to 5.5 V
20
20
20
ns/V
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
–55
°C to
125
°C
–40
°C to
85
°C
UNIT
CC
MIN
MAX
MIN
MAX
MIN
MAX
1.5 V
1.4
1.4
1.4
IOH = –50 µA
3 V
2.9
2.9
2.9
4.5 V
4.4
4.4
4.4
VOH
VI = VIH or VIL
IOH = –4 mA
3 V
2.58
2.4
2.48
V
IOH = –24 mA
4.5 V
3.94
3.7
3.8
IOH = –50 mA†
5.5 V
3.85
IOH = –75 mA†
5.5 V
3.85
1.5 V
0.1
0.1
0.1
IOL = 50 µA
3 V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
VOL
VI = VIH or VIL
IOL = 12 mA
3 V
0.36
0.5
0.44
V
IOL = 24 mA
4.5 V
0.36
0.5
0.44
IOL = 50 mA†
5.5 V
1.65
IOL = 75 mA†
5.5 V
1.65
II
VI = VCC or GND
5.5 V
±0.1
±1
±1
µA
ICC
VI = VCC or GND,
IO = 0
5.5 V
4
80
40
µA
Ci
10
10
10
pF
† Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize
power dissipation. Test verifies a minimum 50-
Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C.


类似零件编号 - CD74AC112M96G4

制造商部件名数据表功能描述
logo
Texas Instruments
CD74AC112M96 TI-CD74AC112M96 Datasheet
331Kb / 6P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
CD74AC112M96 TI-CD74AC112M96 Datasheet
336Kb / 11P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
CD74AC112M96E4 TI-CD74AC112M96E4 Datasheet
336Kb / 11P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
More results

类似说明 - CD74AC112M96G4

制造商部件名数据表功能描述
logo
Texas Instruments
SN54LS112A TI1-SN54LS112A_15 Datasheet
1Mb / 20P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS
SN54H103 TI-SN54H103 Datasheet
157Kb / 3P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR
SN54LS113A TI-SN54LS113A Datasheet
259Kb / 6P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET
logo
NXP Semiconductors
74F113 PHILIPS-74F113 Datasheet
81Kb / 10P
   Dual J-K negative edge-triggered flip-flops without reset
1991 Feb 14
logo
Hitachi Semiconductor
HD74LS107A HITACHI-HD74LS107A Datasheet
70Kb / 6P
   Dual J-K Negative-edge-triggered Flip-Flops(with Clear)
logo
Renesas Technology Corp
HD74LS107A RENESAS-HD74LS107A Datasheet
95Kb / 7P
   Dual J-K Negative-edge-triggered Flip-Flops (with Clear)
logo
Hitachi Semiconductor
HD74LS113 HITACHI-HD74LS113 Datasheet
67Kb / 6P
   Dual J-K Negative-edge-triggered Flip-Flops(with Preset)
logo
Texas Instruments
SN54ALS113A TI1-SN54ALS113A Datasheet
74Kb / 4P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET
54AC11112 TI-54AC11112 Datasheet
94Kb / 7P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
SN54LS112A TI-SN54LS112A Datasheet
300Kb / 9P
[Old version datasheet]   DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com