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DAC37J84IAAV Datasheet(数据表) 90 Page - Texas Instruments

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部件型号  DAC37J84IAAV
说明  Digital-to-Analog Converters
下载  122 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
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DAC37J84IAAV Datasheet(HTML) 90 Page - Texas Instruments

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DAC37J84, DAC38J84
SLASE17B – JANUARY 2014 – REVISED MARCH 2014
www.ti.com
Register Name: config88 – Address: 0x58, Default: 0x00FF
Register
Addr
Default
Bit
Name
Function
Name
(Hex)
Value
config88
0x58
15:10
reserved
Reserved
000000
9
disable_
Assertion means that errors will not be reported on the sync_n output.
0
err_report_link2
8
phadj_ link2
Lane configuration data for link2. Not used by DAC37J84/DAC38J84
0
except for lane configuration checking.
7:0
error_ena_link2
These bits select the errors generated are counted in the err_cnt for the
0xFF
link. The bits also control what signals are sent out the pad_syncb terminal
for error notification.
bit7 = multi-frame alignment error
bit6 = frame alignment error
bit5 = link configuration error
bit4 = elastic buffer overflow (bad RBD value)
bit3 = elastic buffer end char mismatch (match_ctrl match_data)
bit2 = code synchronization error
bit1 = 8b/10b not-in-table code error
bit0 = 8b/10b disparity error
Register Name: config89 – Address: 0x59, Default: 0x0000
Register
Addr
Default
Bit
Name
Function
Name
(Hex)
Value
config89
0x59
15:12
adjcnt_ link3
Lane configuration data for link3. Not used by DAC37J84/DAC38J84 except
0000
for lane configuration checking.
11
adjdir_ link3
Lane configuration data for link3. Not used by DAC37J84/DAC38J84 except
0
for lane configuration checking.
10:7
bid_link3
Lane configuration data for link3. Not used by DAC37J84/DAC38J84 except
0000
for lane configuration checking.
6:2
cf_link3
Lane configuration data for link3. Not used by DAC37J84/DAC38J84 except
00000
for lane configuration checking.
1:0
cs_link3
Lane configuration data for link3. Not used by DAC37J84/DAC38J84 except
00
for lane configuration checking.
Register Name: config90 – Address: 0x5A, Default: 0x00FF
Register
Addr
Default
Bit
Name
Function
Name
(Hex)
Value
config90
0x5A
15:8
did_link3
Lane configuration data for link3. Not used by DAC37J84/DAC38J84
0x00
except for lane configuration checking.
7:0
sync_
These bits select which errors cause a sync request. Sync requests take
0xFF
request_ena_ link3
priority over the error notification, so if sync request isn’t desired, set
these bits to a ‘0’.
bit7 = multi-frame alignment error
bit6 = frame alignment error
bit5 = link configuration error
bit4 = elastic buffer overflow (bad RBD value)
bit3 = elastic buffer end char mismatch (match_ctrl match_data)
bit2 = code synchronization error
bit1 = 8b/10b not-in-table code error
bit0 = 8b/10b disparity error
90
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Copyright © 2014, Texas Instruments Incorporated
Product Folder Links: DAC37J84 DAC38J84




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