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74AC11590DWR 数据表(PDF) 5 Page - Texas Instruments |
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74AC11590DWR 数据表(HTML) 5 Page - Texas Instruments |
5 / 10 page 74AC11590 8BIT BINARY COUNTER WITH REGISTERED 3STATE OUTPUTS SCAS194 − D3988, MARCH 1992 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 2−5 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25 °C MIN MAX UNIT PARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX UNIT 3 V 2.9 2.9 IOH = − 50 µA 4.5 V 4.4 4.4 IOH = − 50 µA 5.5 V 5.4 5.4 VOH IOH = − 4 mA 3 V 2.58 2.48 V VOH IOL = − 24 mA 4.5 V 3.94 3.8 V IOL = − 24 mA 5.5 V 4.94 4.8 IOH = − 75 mA† 5.5 V 3.85 3 V 0.1 0.1 IOL = 50 µA 4.5 V 0.1 0.1 IOL = 50 µA 5.5 V 0.1 0.1 VOL IOL = 12 mA 3 V 0.36 0.44 V VOL IOL = 24 mA 4.5 V 0.36 0.44 V IOL = 24 mA 5.5 V 0.36 0.44 IOL = 75 mA† 5.5 V 1.65 II VI = VCC or GND 5.5 V ±0.1 ±1 µA IOZ VO = VCC or GND 5.5 V ±0.5 ±5 µA ICC VI = VCC or GND, IO = 0 5.5 V 8 80 µA Ci VI = VCC or GND 5 V 3 pF Co VO = VCC or GND 5 V 11 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN MAX UNIT MIN MAX MIN MAX UNIT fclock Clock frequency, CCK or RCK 0 50 0 50 MHz tw Pulse duration CCK or RCK high or low 10 10 ns tw Pulse duration CCLR low 7.4 7.4 ns CCKEN low before CCK ↑ 5.2 5.2 tsu Setup time CCLR high before CCK ↑ 3.4 3.4 ns tsu Setup time CCK ↑ before RCK↑‡ 8.1 8.1 ns th Hold time CCKEN low after CCK ↑ 0 0 ns ‡ This setup time ensures that the register will see stable data from the counter outputs. The clocks may be tied together, in which case the register will be one clock pulse behind the counter. |
类似零件编号 - 74AC11590DWR |
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类似说明 - 74AC11590DWR |
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