ADC10D020

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SNAS143D – SEPTEMBER 2001 – REVISED MARCH 2013

ADC10D020 Dual 10-Bit, 20 MSPS, 150 mW A/D Converter

Check for Samples: ADC10D020

1

FEATURES

DESCRIPTION

The

ADC10D020

is

a

dual

low

power,

high

2

•

Internal Sample-and-Hold

performance CMOS analog-to-digital converter that

•

Internal Reference Capability

digitizes signals to 10 bits resolution at sampling

•

Dual Gain Settings

rates up to 30 MSPS while consuming a typical 150

mW from a single 3.0V supply. No missing codes is

•

Offset Correction

ensured over the full operating temperature range.

•

Selectable Offset Binary or 2's Complement

The unique two stage architecture achieves 9.5

Output

Effective Bits over the entire Nyquist band at 20 MHz

•

Multiplexed or Parallel Output Bus

sample rate. An output formatting choice of offset

binary or 2's complement coding and a choice of two

•

Single +2.7V to 3.6V Operation

gain settings eases the interface to many systems.

•

Power Down and Standby Modes

Also allowing great flexibility of use is a selectable 10-

bit multiplexed or 20-bit parallel output mode. An

APPLICATIONS

offset correction feature minimizes the offset error.

•

Digital Video

To ease interfacing to most low voltage systems, the

•

CCD Imaging

digital output power pins of the ADC10D020 can be

tied to a separate supply voltage of 1.5V to 3.6V,

•

Portable Instrumentation

making the outputs compatible with other low voltage

•

Communications

systems. When not converting, power consumption

•

Medical Imaging

can be reduced by pulling the PD (Power Down) pin

high, placing the converter into a low power state

•

Ultrasound

where it typically consumes less than 1 mW and from

which recovery is less than 1 ms. Bringing the STBY

KEY SPECIFICATIONS

(Standby) pin high places the converter into a

•

Resolution 10 Bits

standby mode where power consumption is about 27

mW and from which recovery is 800 ns.

•

Conversion Rate 20 MSPS

•

ENOB 9.5 Bits (typ)

The ADC10D020's speed, resolution and single

supply operation makes it well suited for a variety of

•

DNL 0.35 LSB (typ)

applications,

including

high

speed

portable

•

Conversion Latency Parallel Outputs 2.5 Clock

applications.

Cycles

Operating over the industrial (

•

Multiplexed Outputs, I Data Bus 2.5 Clock

temperature range, the ADC10D020 is available in a

Cycles

48-pin TQFP package. An evaluation board is

•

Multiplexed Outputs, Q Data Bus 3 Clock

available to ease the design effort.

Cycles

•

PSRR 90 dB

•

Power Consumption—Normal Operation 150

mW (typ)

•

Power Down Mode <1 mW (typ)

•

Fast Recovery Standby Mode 27 mW (typ)

1

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2

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PRODUCTION DATA information is current as of publication date.

Copyright © 2001–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.