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SN74AUC2G66YZPR 数据表(PDF) 1 Page - Texas Instruments |
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SN74AUC2G66YZPR 数据表(HTML) 1 Page - Texas Instruments |
1 / 16 page SN74AUC2G66 DUAL BILATERAL ANALOG SWITCH SCES507 − NOVEMBER 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Available in the Texas Instruments NanoStar and NanoFree Packages D Operates at 0.8 V to 2.7 V D Sub 1-V Operable D Max tpd of 0.5 ns at 1.8 V D Low Power Consumption, 10 µA at 2.7 V D High On-Off Output Voltage Ratio D High Degree of Linearity D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Performance Tested Per JESD 22 − 2000-V Human-Body Model (A114-B, Class II) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering information This dual analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC operation. The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V (peak) to be transmitted in either direction. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING‡ NanoStar − WCSP (DSBGA) 0.23-mm Large Bump − YEP Tape and reel SN74AUC2G66YEPR _ _ _U6_ −40 °C to 85°C NanoFree − WCSP (DSBGA) 0.23-mm Large Bump − YZP (Pb-free) Tape and reel SN74AUC2G66YZPR _ _ _U6_ SSOP − DCT Tape and reel SN74AUC2G66DCTR U66_ _ _ VSSOP − DCU Tape and reel SN74AUC2G66DCUR U66_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). DCT OR DCU PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5 1A 1B 2C GND VCC 1C 2B 2A 4 3 2 1 5 6 7 8 GND 2C 1B 1A 2A 2B 1C VCC YEP OR YZP PACKAGE (BOTTOM VIEW) Copyright 2003, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar and NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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类似说明 - SN74AUC2G66YZPR |
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