FM24V01A

Document Number: 001-90869 Rev. *H

Page 3 of 19

Pinout

Figure 1. 8-pin SOIC Pinout

WP

SCL

1

2

3

4

5

A0

8

7

6

VDD

SDA

A1

Top View

not to scale

VSS

A2

Pin Definitions

Pin Name

I/O Type

Description

A0-A2

Input

Device Select Address 0-2. These pins are used to select one of up to eight devices of the same type

on the same two-wire bus. To select the device, the address value on the three pins must match the

corresponding bits contained in the slave address. The address pins are pulled down internally.

SDA

Input/Output Serial Data Address. This is a bidirectional pin for the two-wire interface. It is open-drain and is

intended to be wire-AND'd with other devices on the two-wire bus. The input buffer incorporates a

Schmitt trigger for noise immunity and the output driver includes slope control for falling edges. An

external pull-up resistor is required.

SCL

Input

Serial Clock. The serial clock pin for the two-wire interface. Data is clocked out of the part on the falling

edge, and into the device on the rising edge. The SCL input also incorporates a Schmitt trigger input

for noise immunity.

WP

Input

WP is connected to ground, all addresses are write enabled. This pin is pulled down internally.

Power supply Ground for the device. Must be connected to the ground of the system.

Power supply Power supply input to the device.