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LM5030SD 数据表(PDF) 10 Page - Texas Instruments |
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LM5030SD 数据表(HTML) 10 Page - Texas Instruments |
10 / 28 page LOGIC OSC VIN VCC CS 0.5V 0.625V LOGIC OUT1 OUT2 GND 7.7V SERIES REGULATOR GENERATOR REFERENCE SLOPECOMP RAMP GENERATOR DRIVER DRIVER PWM Rt / SYNC 45PA 0 CLK SS VCC VCC SHUTDOWN COMPARATOR ENABLE ENABLE 2k 5V 1.25V ERROR AMP SOFT START 10PA 0.45V VFB 5k 5V 1.4V 100k 50k COMP 1.25V SS + - + - + - + - CLK CLR SET J Q K Q CLR SET S Q R Q LM5030 SNVS215D – APRIL 2003 – REVISED NOVEMBER 2015 www.ti.com 7 Detailed Description 7.1 Overview The LM5030 high-voltage PWM controller contains all of the features needed to implement push-pull and bridge topologies, using current-mode control in a small 10-pin package. Features included are, start-up regulator, dual mode current limit, dual alternating gate drivers, thermal shutdown, softstart, and slope compensation. This high speed IC has total propagation delays < 100 ns. The functional block diagram of the LM5030 is shown in Functional Block Diagram. The LM5030 is designed for current-mode control converters that require alternating outputs, such as push-pull and half- and full-bridge topologies. The features included in the LM5030 enable all of the advantages of current- mode control, line feed-forward, cycle-by-cycle current limit, and simplified loop compensation. The oscillator ramp is internally buffered and added to the PWM comparator input to provide the necessary slope compensation for current-mode control at higher duty cycles. 7.2 Functional Block Diagram 10 Submit Documentation Feedback Copyright © 2003–2015, Texas Instruments Incorporated Product Folder Links: LM5030 |
类似零件编号 - LM5030SD |
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类似说明 - LM5030SD |
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