02097-DSH-001-C

Mindspeed Technologies

®

November 2006

Preliiminary Information/Mindspeed Proprietary and Confidential

M02097-11/-21

3.3/5V LED Driver / Limiting Amplifier

for Operation to 500 Mbps

Preliminary Information

This document contains information on a new product. The parametric information, although not

fully characterized, is the result of testing initial devices.

Applications

• 155Mbps LAN ATM Transceivers

• ESCON Receivers

• Fast Ethernet/FDDI

• Multimode LED Transmitters

• SFP Transceivers

• IEEE 1394 S100, S200 and S400 Transceivers

Features

• High speed operation; suitable for applications to 500 Mbps. 200 ps

typical rise/fall time into 5

Ω.

• Programmable modulation current to 120 mA

• Integrated power supply switch for redundant shutdown under a

fault condition

The M02097 is an integrated LED driver and limiting amplifier for applications to 500 Mbps. The LED driver

modulation output can be AC or DC coupled to an LED. The device can operate from a 3.3V or 5V supply.

The M02097 includes monitors for bias and modulation current. Integrated safety circuitry provides latched bias

The limiting amplifier also includes a programmable signal-level detector, allowing the user to set thresholds at

which the logic outputs are enabled. The M02097-11 features a PECL LOS-ST output while the M02097-21

features a CMOS (external pull-up required) LOS-ST output. PECL outputs are available on the limiting amplifier.

Configuration logic provides flexibility in setting data path polarity, safety logic configuration, and LOS behavior.

M02097 Block Diagram

OUT+

OUT-

Input

Buffer

TX

Disable

RESET

GND

3.3V Regulator

with Bypass

To Safety

Logic

To Safety

Logic

Laser

Driver

MODSET

LED Pre-Bias Control

Threshold

Setting

Circuit

Biasing

RxOUTp

RxOUTm

RSSI

LOS-ST

RxINm

Iref

RxINp

STSET

Offset Cancel

DCR_Disable

Limiting

Amplifier

SCB

Safety

Circuitry with

Latched Fault

Output

Buffer

Tx_Polarity

Rx_Polarity

CONFIG_2

Tx_Polarity

Rx_Polarity

CONFIG_3

CONFIG_1

DCR_Disable

LOS-to-JAM

CONFIG_4

LOS-to-JAM

LOS-ST_sel

LOS-ST_sel

LOS

Level

Detect

Comparator

Configuration

Logic

Modulation

Control

Vttx

4k

Ω

4k

Ω

Vttr

2k

Ω

2k

Ω

Output

Buffer

Regulator

with Bypass

CMOS/TTL

(-21)

PECL (-11)

PECL

Features (con’t)

• Temperature compensation for modulation current

• Pre-bias adjustment to improve LED edge speed

• SFP compliant safety circuitry (configurable)

• 6mV input limiting amp sensitivity at 500 Mbps.

• PECL limiting amplifier outputs

• Limiting amplifier includes integrated DC offset cancellation circuit

• Polarity Control for both the driver and limiting amplifier data paths

• Operates with 3.3V or 5V supply with an internal auto-sensing

regulator that enables with 5V supplies and is bypassed with 3.3V

supplies

• Powers 3.3V ROSAs from its Receiver Regulator output enabling true

3.3/5V designs using all 3.3V Mindspeed TIAs