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DM54LS174J Datasheet(数据表) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件型号  DM54LS174J
说明  Hex/Quad D Flip-Flops with Clear
下载  8 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
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DM54LS174J Datasheet(HTML) 4 Page - National Semiconductor (TI)

   
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’LS175 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
VI
Input Clamp Voltage
VCC e Min II eb18 mA
b
15
V
VOH
High Level Output
VCC e Min IOH e Max
DM54
25
34
V
Voltage
VIL e Max VIH e Min
DM74
27
34
VOL
Low Level Output
VCC e Min IOL e Max
DM54
025
04
Voltage
VIL e Max VIH e Min
DM74
035
05
V
IOL e 4 mA VCC e Min
DM74
025
04
II
Input Current Max
VCC e Max VI e 7V
01
mA
Input Voltage
IIH
High Level Input Current
VCC e Max VI e 27V
20
m
A
IIL
Low Level Input
VCC e Max
Clock
b
04
Current
VI e 04V
Clear
b
04
mA
Data
b
036
IOS
Short Circuit
VCC e Max
DM54
b
20
b
100
mA
Output Current
(Note 2)
DM74
b
20
b
100
ICC
Supply Current
VCC e Max (Note 3)
11
18
mA
’LS175 Switching Characteristics
at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
From (Input)
RL e 2kX
Symbol
Parameter
To (Output)
CL e 15 pF
CL e 50 pF
Units
Min
Max
Min
Max
fMAX
Maximum Clock Frequency
30
25
MHz
tPLH
Propagation Delay Time
Clock to
30
32
ns
Low to High Level Output
Q or Q
tPHL
Propagation Delay Time
Clock to
30
36
ns
High to Low Level Output
Q or Q
tPLH
Propagation Delay Time
Clear to
25
29
ns
Low to High Level Output
Q
tPHL
Propagation Delay Time
Clear to
35
42
ns
High to Low Level Output
Q
Note 1
All typicals are at VCC e 5V TA e 25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3
With all outputs open and 45V applied to all data and clear inputs ICC is measured after a momentary ground then 45V applied to the clock input
4




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