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GS2988-INTE3 数据表(PDF) 7 Page - Gennum Corporation |
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GS2988-INTE3 数据表(HTML) 7 Page - Gennum Corporation |
7 / 17 page GS2988 Dual-Slew-Rate, Cable Driver with 3Gb/s Capability Data Sheet 52131 - 4 December 2010 7 of 17 2.3 AC Electrical Characteristics Table 2-2: AC Electrical Characteristics VCC = 3.3V ±5% or 2.5V ±5%; TA = -40°C to +85°C, unless otherwise shown Parameter Symbol Conditions Min Typ Max Units Notes Serial input data rate DRSDO –.27 – 2.97 Gb/s 1 Additive jitter – 2.97Gb/s – 10 – psp-p 2 – 1.485Gb/s – 10 – psp-p 2 – 270Mb/s – 30 – psp-p 2 Rise/Fall time tr, tf SD/HD=0 – – 135 ps 3 tr, tf SD/HD=1 400 – 800 ps 3 Mismatch in rise/fall time tr, tf HD/3G modes only – – 35 ps – Duty cycle distortion – SD/HD=0, 2.97Gb/s – – 14 ps 4, 5 – SD/HD=0, 1.485Gb/s – – 20 ps 4, 5 – SD/HD=1 – – 50 ps 4, 5 Overshoot – SD/HD=0, – – 10 % 4 Output Return Loss ORL 5 MHz – 1.485GHz 17 19 – dB 6 1.485GHz – 2.97GHz 13 15 – dB 6 Output Voltage Swing VOUT RSET = 750Ω 750 800 850 mVp-p 4 Input Voltage Swing VDDI Guaranteed functional. 100 – 250 mVp-pd – Guaranteed to meet all published specifications. 250 2200 mVp-pd – Output Enable Delay – – – – 100 ns – Output Disable Delay – – – – 80 ns – NOTES: 1. The input coupling capacitor must be set accordingly for lower data rates. 2. Turning on input trace equalization will reduce jitter in most applications. 3. Rise/Fall time measured between 20% and 80%. 4. Single-ended into 75 Ω external load. 5. Calculated as the actual positive bit-width compared to the expected positive bit-width using a 1010 pattern. 6. ORL depends on board design. The GS2988 achieves this specification on Gennum's evaluation boards. |
类似零件编号 - GS2988-INTE3 |
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类似说明 - GS2988-INTE3 |
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