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DAC3484_15 Datasheet(数据表) 69 Page - Texas Instruments

部件型号  DAC3484
说明  Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter
下载  107 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
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DAC3484 Datasheet(HTML) 69 Page - Texas Instruments

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DAC3484
www.ti.com
SLAS749E – MARCH 2011 – REVISED NOVEMBER 2015
Table 13. Register Name: config1 – Address: 0x01, Default: 0x050E
Register
Default
Address
Bit
Name
Function
Name
Value
config1
0x01
15
iotest_ena
When set, enables the data pattern checker test. The outputs are
0
deactivated regardless of the state of TXENABLE and
sif_txenable.
14
Reserved
Reserved for factory use.
0
13
Reserved
Reserved for factory use.
0
12
64cnt_ena
When set, enables resetting of the alarms after 64 good samples
0
with the goal of removing unnecessary errors. For instance, when
checking setup/hold through the pattern checker test, there may
initially be errors. Setting this bit removes the need for a SIF write to
clear the alarm register.
11
oddeven_parity
Selects between odd and even parity check
0
MM 0: Even parity
MM 1: Odd parity
10
word_parity_ena
When set, enables parity checking of each input word using the
1
PARITYP/N parity input. It should match the oddeven_parity
register setting.
9
frame_parity_ena
When set, enables parity checking using the FRAME signal to
0
source the parity bit.
8
quad_ena
When set, the device is in quad channel mode. To enable the dual
1
channel mode, set Config1, bit <8> to 0b and Config16, bit<13:12>
to 11b. This dual channel mode is functionally equivalent to the dual
channel DAC3484 (channels B and C active). See the DAC3484
SLAS748 datasheet for details.
7
dacA_complement
When set, the DACA output is complemented. This allows to
0
effectively change the + and – designations of the LVDS data lines.
6
dacB_complement
When set, the DACB output is complemented. This allows to
0
effectively change the + and – designations of the LVDS data lines.
5
dacC_complement
When set, the DACC output is complemented. This allows to
0
effectively change the + and – designations of the LVDS data lines.
4
dacD_complement
When set, the DACD output is complemented. This allows to
0
effectively change the + and – designations of the LVDS data lines.
3
alarm_2away_ena
When set, the alarm from the FIFO indicating the write and read
1
pointers being 2 away is enabled.
2
alarm_1away_ena
When set, the alarm from the FIFO indicating the write and read
1
pointers being 1 away is enabled.
1
alarm_collision_ena
When set, the alarm from the FIFO indicating a collision between the
1
write and read pointers is enabled.
0
Reserved
Reserved for factory use.
0
Copyright © 2011–2015, Texas Instruments Incorporated
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69
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