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SI4706-D50 数据表(PDF) 10 Page - Silicon Laboratories |
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SI4706-D50 数据表(HTML) 10 Page - Silicon Laboratories |
10 / 36 page Si4706-D50 10 Rev. 1.0 Figure 6. Digital Audio Interface Timing Parameters, I2S Mode Table 7. Digital Audio Interface Characteristics (VA = 2.7 to 5.5 V, VD = 1.62 to 3.6 V, TA = –20 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit DCLK Cycle Time tDCT 26 — 1000 ns DCLK Pulse Width High tDCH 10 — — ns DCLK Pulse Width Low tDCL 10 — — ns DFS Setup Time to DCLK Rising Edge tSU:DFS 5— — ns DFS Hold Time from DCLK Rising Edge tHD:DFS 5— — ns DOUT Propagation Delay from DCLK Falling Edge tPD:DOUT 0— 12 ns DCLK DFS tDCT tPD:OUT tSU:DFS tHD:DFS DOUT tDCH tDCL |
类似零件编号 - SI4706-D50 |
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类似说明 - SI4706-D50 |
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