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SI4700-EVB 数据表(PDF) 4 Page - Silicon Laboratories |
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SI4700-EVB 数据表(HTML) 4 Page - Silicon Laboratories |
4 / 44 page Si4700/01/02/03-EVB 4 Rev. 0.9 3. Description The following sections refer to both the image in Figure 1 and the silk screen on the Si4700/01/02/03 EVB. It is recommended to refer to both when using this guide. Figure 1. Locations of I/O Connectors/Devices Baseboard I/O connectors/devices: J1 USB connector for USB interface J2 JTAG connector for the C8051F320 MCU J3 20-pin Expansion I/O connector J4 Power input terminal block J5 Baseboard card connector (not visible when the baseboard and daughter card are mated) J6 SMA connector for external 32.768 kHz RCLK clock input J7 2.1 mm power connector J10 BNC connector for left audio output J11 BNC connector for right audio output PB1 Push-button to reset the C8051F320 MCU D1 LED to confirm power supply to the C8051F320 MCU X1 Baseboard 32.768 kHz crystal oscillator SW1 USB (J7–J4) power selection switch Daughter card I/O connectors/devices: J1 SMA connector for RF (single-ended or non- inverting differential) input J2 Baseboard connector (not visible when the baseboard and daughter card are mated) J3 Stereo headphone connector for audio output and antenna input U1 Si4700/01/02/03 U2 LOUT/ROUT audio op-amp U4 Headphone audio op-amp U5 Schmidt trigger buffer (not visible) X1 Daughter card 32.768 kHz crystal. The EVB consists of various subsystems that are explained in greater detail in the following sections. D1 J2 PB1 J1 J6 J3 J3 - Daughter Card J1 - Daughter Card U1 J10 J11 J4 J5 (not visible) U4 J2 - Daughter Card (not visible) X1 X1 - Daughter Card U2 SW1 J7 |
类似零件编号 - SI4700-EVB |
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类似说明 - SI4700-EVB |
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