AN349

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Rev. 0.1

3.2. Hardware Control Registers

The following set of registers alter the hardware in some way. These registers are typically the first group to be

programmed.

3.2.1. ENABLE (02h.0)/DISABLE (02h.6)—Powerup Control

The ENABLE/DISABLE bits are analogous to the on/off buttons of the device. ENABLE=1 turns the device on while

DISABLE=1 turns the device off (powerdown mode). When writing the register to place the device into powerdown

mode, ENABLE should remain set to 1 while setting DISABLE to 1. The device clears the ENABLE and DISABLE

bits, indicating the powerdown mode has been entered.

Table 3 shows the sequence of commands required to powerup the device. Note that address 07h may be written

during powerup configuration.

Table 2. Status Bit Classification

Bit(s)

Static

Static After Power Up

Dynamic After Power Up

PN

X

MFGID

X

REV

X

DEV

X

FIRMWARE

X

ST

X

RSSI

X

READCHAN

X

STC

X

SF/BL

X

AFCRL

X

RDSR

X

RDSS

X

BLERA

X

BLERB

X

BLERC

X

BLERD

X

RDSA

X

RDSB

X

RDSC

X

RDSD

X