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SI4701 数据表(PDF) 5 Page - Silicon Laboratories

部件名 SI4701
功能描述  Device initialization sequence and busmode selection
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制造商  SILABS [Silicon Laboratories]
网页  http://www.silabs.com
标志 SILABS - Silicon Laboratories

SI4701 数据表(HTML) 5 Page - Silicon Laboratories

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AN230
Rev. 0.9
5
2.1.1. Hardware Initialization
The FM tuner device is capable of communicating using either a 3-wire or 2-wire interface. The selection of this
interface is made during the reset sequence.
Figure 1 demonstrates the sequencing of hardware events relative to reset. Figure 2 combines this information
with the setting of the ENABLE and DISABLE bits to better describe the possible combinations. The following steps
should be used to initialize the device properly.
1. Supply VA and VD.
2. Supply VIO while keeping the RST pin low. Note that power supplies may be sequenced in any order (steps 1
and 2 may be reversed).
3. Configure the proper pins for bus mode selection. See Figure 3, “Powerup, Powerdown, and Reset Flowchart,”
on page 7.
4. Set the RST pin high. The device registers may now be read and written.
5. Provide RCLK. If using the internal oscillator option, set the XOSCEN bit. Provide a sufficient delay before
setting the ENABLE bit to ensure that the oscillator has stabilized. The delay will vary depending on the external
oscillator circuit and the ESR of the crystal, and it should include margin to allow for device tolerances. The
recommended minimum delay is no less than 500 ms. A similar delay may be necessary for some external
oscillator circuits. Determine the necessary stabilization time for the clock source in the system.
To experimentally measure the minimum oscillator stabilization time, adjust the delay time between setting the
XOSCEN and ENABLE bits. After powerup, use the Set Property Command described in "5.1.Si4702/03
Commands (Si4702/03 Rev C or Later Device Only)" on page 31 to read property address 0x0700. If the delay
exceeds the minimum oscillator stabilization time, the property value will read 0x1980 ±20%. If the property
value is above this range, the delay time is too short. The selected delay time should include margin to allow for
device tolerances.
6. Si4703-C19 Errata Solution 2: Set RDSD = 0x0000. Note that this is a writable register.
7. Set the ENABLE bit high and the DISABLE bit low to powerup the device.
Unpredictable behavior could result if a non-zero value is present in the RDSD register of the Si4703-C19 when
it is enabled. Note that no other device will experience this behavior. There are three solutions available to
ensure a zero value in the RDSD register when the Si4703-C19 is enabled and only one solution need be
selected.
a. Solution 1—Generate a hard reset before enabling the tuner to clear the RDSD register. This is
described in steps 2, 3, and 4 above and in step 1, To power up the device (after power down), of 2.1.2.
"Hardware Powerdown” below. This must be done every time the tuner is enabled.
b. Solution 2—Write a zero value to the RDSD register before enabling the tuner. This is described in step
6 above and must be done every time the tuner is enabled.
c. Solution 3—Disable RDS by setting RDS = 0 before disabling the tuner. This is described in step 1, To
power down the device, of 2.1.2. "Hardware Powerdown” below and must be done every time the tuner
is disabled. When the device is disabled, the RDSD register is automatically set to zero in preparation for
the next time the device is enabled.
2.1.2. Hardware Powerdown
A powerdown mode is available to reduce power consumption when the part is idle. Setting both the ENABLE bit
high and the DISABLE bit high starts the powerdown sequence. This disables analog and digital circuitry while
maintaining register configuration and keeping the bus active. Note that the device automatically sets the ENABLE
bit low after the internal powerdown sequence completes. Setting the ENABLE bit low directly will cause the device
to partially powerdown and should be avoided. See Figure 2. Setting the ENABLE bit high and the DISABLE bit low
will bring the device out of powerdown mode and resume normal operation. Refer to Figure 1 for more information.
To power down the device:
1. Si4703-C19 Errata Option 3: Set RDS = 0.


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