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SL23EP04NZZI-1 数据表(PDF) 6 Page - Silicon Laboratories

部件名 SL23EP04NZZI-1
功能描述  Low Jitter and Skew DC to 220 MHz Clock Buffer
Download  11 Pages
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制造商  SILABS [Silicon Laboratories]
网页  http://www.silabs.com
标志 SILABS - Silicon Laboratories

SL23EP04NZZI-1 数据表(HTML) 6 Page - Silicon Laboratories

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Rev 2.1, May 2, 2008
Page 6 of 11
SL23EP04NZ
DC Electrical Characteristics (I-Grade and VDD=3.3V)
Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C
Description
Symbol
Condition
Min
Typ
Max
Unit
Input Low Voltage
VINL
CLKIN and OE
0.8
V
Input High Voltage
VINH
CLKIN and OE
2.0
VDD+0.3
V
Input Low Current
IINL
0 < VIN < 0.8V
10
µA
Input High Current
IINH
2.4V < VIN < VDD
15
µA
Output Low Voltage
VOL
IOL=12mA
0.4
V
Output High Voltage
VOH
IOH=-12mA
2.4
V
Power Supply Current
IDD1
CLKIN=33MHz
CL=0 (No load at outputs)
9
13
mA
Power Supply Current
IDD2
CLKIN=66MHz
CL=0 (No load at outputs)
11
16
mA
Power Supply Current
IDD3
CLKIN=166MHz
CL=0 (No load at outputs)
15
21
mA
Switching Electrical Characteristics (I-Grade and VDD=3.3V)
Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C
Description
Symbol
Condition
Min
Typ
Max
Unit
Output Frequency Range
FOUT1
CL=15pF
0
-
200
MHz
FOUT2
CL=30pF
0
-
134
MHz
Input Duty Cycle
DC1
Measured at VDD/2
20
50
80
%
Output Duty Cycle
DC2
CL=15pF, Fout=166MHz
Measured at VDD/2
45
50
55
%
Output Duty Cycle
DC3
CL=30pF, Fout=134MHz
Measured at VDD/2
40
50
60
%
Output Rise/Fall Time
tr/f-1
CL=15pF, measured at 0.6V to 1.8V
1.4
ns
Output Rise/Fall Time
tr/f-2
CL=30pF, measured at 0.6V to 1.8V
1.8
ns
Output to Output Skew
SKW1
Measured at VDD/2 and
Outputs are equally loaded
70
140
ps
Part to Part Skew
SKW2
Measured at VDD/2 and
Outputs are equally loaded
90
180
ps
Propagation Delay Time
PDT
Measured at VDD/2 from CLKIN to
Output Clock rising edge and Outputs
are equally loaded
1.2
2.5
3.8
ns
Cycle-to-Cycle Jitter
CCJ1
CLKIN=66MHz and CL=0 (No Load)
40
80
ps
Cycle-to-Cycle Jitter
CCJ2
CLKIN=166MHz and CL=0 (No Load)
30
60
ps
Power-up Time
tpu
Power-up time for VDD to reach
minimum specified time
0.05
100
ms


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