SI5346 datasheet(6/59 Pages) SILABS

部件名	SI5346

功能描述	DUAL/QUAD DSPLL ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATORS

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制造商	SILABS [Silicon Laboratories]

网页	http://www.silabs.com

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6 / 59 page

Si5347/46

6

Rev. 1.1

Table 3. Input Specifications

(VDD =1.8 V ±5%, VDDA =3.3 V ±5%, TA = –40 to 85 °C)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Standard Differential or Single-Ended/LVCMOS — AC-coupled (IN0, IN1, IN2, IN3/FB_IN)

Input Frequency Range

fIN_DIFF

Differential

0.008

—

750

MHz

Single-ended/LVCMOS

0.008

—

250

Input Voltage Swing

VIN_DIFF

fIN< 250 MHz, Differential

100

—

1800

mVpp_se

250 MHz < fIN< 750 MHz,

Differential

225

—

1800

mVpp_se

Input Voltage Amplitude

VIN_SE

fIN< 250 MHz, Single-

ended

100

—

3600

mVpp_se

Slew Rate1,2

SR

400

—

V/µs

Duty Cycle

DC

40

—

60

%

Capacitance

CIN

—2

—

pF

Pulsed CMOS — DC-coupled (IN0, IN1, IN2, IN3)3

Input Frequency

fIN_-

PULSED

0.008

—

250

MHz

Input Voltage

VIL

–0.2

—

0.33

V

VIH

0.49

—

V

Slew Rate1,2

SR

400

—

V/µs

Minimum Pulse Width

PW

Pulse Input

1.6

—

ns

Input Resistance

RIN

—8

—

k



REFCLK (Applied to XA/XB)

REFCLK Frequency

fIN_REF

Frequency range for best

output jitter performance

48

—

54

MHz

Input Voltage Swing

VIN_DIFF

365

—

2500

mVpp_diff

VIN_SE

365

—

2000

mVpp_se

Slew rate1,2

SR

Imposed for best jitter per-

formance

400

—

V/µs

Input Duty Cycle

DC

40

—

60

%

Notes:

1. Imposed for jitter performance.

2. Rise and fall times can be estimated using the following simplified equation: tr/tf80-20 = ((0.8 - 0.2) x VIN_Vpp_se) / SR.

3. Pulsed CMOS mode is intended primarily for single-ended LVCMOS input clocks < 1 MHz, which must be dc-coupled

because they have a duty cycle significantly less than 50%. A typical application example is a low frequency video

frame sync pulse. Since the input thresholds (VIL, VIH) of this buffer are non-standard (0.33 and 0.49 V, respectively),

refer to the input attenuator circuit for DC-coupled Pulsed LVCMOS in the Si5347-46 Family Reference Manual.

Otherwise, for standard LVCMOS input clocks, use the Standard AC-coupled, Single-ended input mode.

类似零件编号 - SI5346

制造商	部件名	数据表	功能描述
Silicon Laboratories	Si5346	948Kb / 55P	Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators
Silicon Laboratories	Si5346-D-EVB	948Kb / 55P	Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators
Skyworks Solutions Inc.	SI5346-D-EVB	879Kb / 56P	Dual/Quad DSPLL™ Any-Frequency, Any-Output Jitter Attenuators Rev. 1.1
Silicon Laboratories	SI5346-EVB	2Mb / 20P	Powered from USB port or external power supply
Silicon Laboratories	Si5346A-D-GM	948Kb / 55P	Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators

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类似说明 - SI5346

制造商	部件名	数据表	功能描述
Silicon Laboratories	SI5347	948Kb / 55P	Dual/Quad DSPLL Any-Frequency, Any-Output Jitter Attenuators
Skyworks Solutions Inc.	SI5347	879Kb / 56P	Dual/Quad DSPLL™ Any-Frequency, Any-Output Jitter Attenuators Rev. 1.1
Skyworks Solutions Inc.	SI5397	1Mb / 60P	Dual/Quad DSPLL™ Any-Frequency, Any-Output Jitter Attenuators Rev. 1.2
Silicon Laboratories	SI5341	2Mb / 56P	LOW-JITTER, 10-OUTPUT, ANY-FREQUENCY, ANY-OUTPUT CLOCK GENERATOR
	SI5345	1Mb / 60P	10-Channel, Any-Frequency, Any-Output Jitter Attenuator/ Clock Multiplier
	SI5345	1Mb / 62P	10-CHANNEL, ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATOR/CLOCK MULTIPLIER
Skyworks Solutions Inc.	SI5391	1Mb / 45P	Ultra Low-Jitter, 12-Output, Any-Frequency, Any-Output Clock Generator Rev. 0.7
	SI5345	976Kb / 58P	10-Channel, Any-Frequency, Any-Output Jitter Attenuator/ Clock Multiplier Rev. 1.2
	SI5334	1Mb / 37P	PIN-CONTROLLED ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR Rev. 1.3
	SI5341	1Mb / 49P	Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator Rev. 1.1

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