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54AC169 数据表(PDF) 3 Page - National Semiconductor (TI) |
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54AC169 数据表(HTML) 3 Page - National Semiconductor (TI) |
3 / 10 page Functional Description (Continued) the TC signal is derived by decoding the flip-flop states, there exists the possibility of decoding spikes on TC. For this reason the use of TC as a clock signal is not recommended (see logic equations below). 1. Count Enable = CEP •CET • PE 2. Up: TC = Q 0•Q1•Q 2Q3•(Up)•CET 3. Down: TC = Q 0• Q1•Q2•Q3 •(Down)•CET Mode Select Table PE CEP CET U/D Action on Rising Clock Edge L X X X Load (P n to Qn) H L L H Count Up (Increment) H L L L Count Down (Decrement) H H X X No Change (Hold) H X H X No Change (Hold) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial State Diagrams DS100276-6 3 www.national.com |
类似零件编号 - 54AC169 |
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类似说明 - 54AC169 |
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