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MT46V32M4-1 数据表(PDF) 41 Page - Micron Technology |
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MT46V32M4-1 数据表(HTML) 41 Page - Micron Technology |
41 / 68 page 41 128Mb: x4, x8, x16 DDR SDRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. 128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01 ©2001, Micron Technology, Inc. 128Mb: x4, x8, x16 DDR SDRAM PRELIMINARY TRUTH TABLE 4 – CURRENT STATE BANK n – COMMAND TO BANK m (Notes: 1-6; notes appear below and on next page) CURRENT STATE CS# RAS# CAS# WE# COMMAND/ACTION NOTES Any H X X X DESELECT (NOP/continue previous operation) L H H H NO OPERATION (NOP/continue previous operation) Idle XXXX Any Command Otherwise Allowed to Bank m Row L L H H ACTIVE (select and activate row) Activating, L H L H READ (select column and start READ burst) 7 Active, or L H L L WRITE (select column and start WRITE burst) 7 Precharging L L H L PRECHARGE Read L L H H ACTIVE (select and activate row) (Auto- L H L H READ (select column and start new READ burst) 7 Precharge L H L L WRITE (select column and start WRITE burst) 7, 9 Disabled) L L H L PRECHARGE Write L L H H ACTIVE (select and activate row) (Auto- L H L H READ (select column and start READ burst) 7,8 Precharge L H L L WRITE (select column and start new WRITE burst) 7 Disabled) L L H L PRECHARGE Read L L H H ACTIVE (select and activate row) (With Auto- L H L H READ (select column and start new READ burst) 7, 3a Precharge) L H L L WRITE (select column and start WRITE burst) 7, 9, 3a L L H L PRECHARGE Write L L H H ACTIVE (select and activate row) (With Auto- L H L H READ (select column and start READ burst) 7, 3a Precharge) L H L L WRITE (select column and start new WRITE burst) 7, 3a L L H L PRECHARGE NOTE: 1. This table applies when CKEn-1 was HIGH and CKEn is HIGH (see Truth Table 2) and after tXSNR has been met (if the previous state was self refresh). 2. This table describes alternate bank operation, except where noted (i.e., the current state is for bank n and the commands shown are those allowed to be issued to bank m, assuming that bank m is in such a state that the given command is allowable). Exceptions are covered in the notes below. (Notes continue on next page) |
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