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MT46V128M4 数据表(PDF) 16 Page - Micron Technology

部件名 MT46V128M4
功能描述  DOUBLE DATA RATE DDR SDRAM
Download  68 Pages
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制造商  MICRON [Micron Technology]
网页  http://www.micron.com
标志 MICRON - Micron Technology

MT46V128M4 数据表(HTML) 16 Page - Micron Technology

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512Mb: x4, x8, x16 DDR SDRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512Mx4x8x16DDR_B.p65 – Rev. B; Pub 4/01
©2001, Micron Technology, Inc.
512Mb: x4, x8, x16
DDR SDRAM
ADVANCE
Operations
BANK/ROW ACTIVATION
Before any READ or WRITE commands can be is-
sued to a bank within the DDR SDRAM, a row in that
bank must be “opened.” This is accomplished via the
ACTIVE command, which selects both the bank and
the row to be activated, as shown in Figure 4.
After a row is opened with an ACTIVE command, a
READ or WRITE command may be issued to that row,
subject to the tRCD specification. tRCD (MIN) should
be divided by the clock period and rounded up to the
next whole number to determine the earliest clock edge
after the ACTIVE command on which a READ or WRITE
command can be entered. For example, a tRCD specifi-
cation of 20ns with a 133 MHz clock (7.5ns period) re-
sults in 2.7 clocks rounded to 3. This is reflected in
Figure 5, which covers any case where 2 < tRCD (MIN)/
tCK
≤ 3. (Figure 5 also shows the same case for tRCD; the
same procedure is used to convert other specification
limits from time units to clock cycles).
A subsequent ACTIVE command to a different row
in the same bank can only be issued after the previous
active row has been “closed” (precharged). The mini-
mum time interval between successive ACTIVE com-
mands to the same bank is defined by tRC.
A subsequent ACTIVE command to another bank
can be issued while the first bank is being accessed,
which results in a reduction of total row-access over-
head. The minimum time interval between successive
ACTIVE commands to different banks is defined by
tRRD.
Figure 5
Example: Meeting tRCD (tRRD) MIN When 2 < tRCD (tRRD) MIN/tCK
≤≤≤≤≤ 3
Figure 4
Activating a Specific Row in
a Specific Bank
CS#
WE#
CAS#
RAS#
CKE
A0-A12
RA
RA = Row Address
BA = Bank Address
HIGH
BA0,1
BA
CK
CK#
t
COMMAND
BA0, BA1
ACT
ACT
NOP
RRD
tRCD
CK
CK#
Bank x
Bank y
A0-A12
Row
Row
NOP
RD/WR
NOP
Bank y
Col
NOP
T0
T1
T2
T3
T4
T5
T6
T7
DON’T CARE
NOP


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