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93LC46B-ST 数据表(PDF) 6 Page - Microchip Technology |
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93LC46B-ST 数据表(HTML) 6 Page - Microchip Technology |
6 / 12 page 93LC46A/B DS21173E-page 6 2000 Microchip Technology Inc. 3.6 ERASE/WRITE Disable and Enable (EWDS/EWEN) The 93LC46A/B powers up in the ERASE/WRITE Dis- able (EWDS) state. All programming modes must be preceded by an ERASE/WRITE Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruc- tion is executed or Vcc is removed from the device. To protect against accidental data disturbance, the EWDS instruction can be used to disable all ERASE/WRITE functions and should follow all programming opera- tions. Execution of a READ instruction is independent of both the EWEN and EWDS instructions. 3.7 READ The READ instruction outputs the serial data of the addressed memory location on the DO pin. A dummy zero bit precedes the 8-bit (93LC46A) or 16-bit (93LC46B) output string. The output data bits will tog- gle on the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is pos- sible when CS is held high. The memory data will auto- matically cycle to the next register and output sequentially. FIGURE 3-4: EWDS TIMING FIGURE 3-5: EWEN TIMING FIGURE 3-6: READ TIMING CS CLK DI 10 00 0 X ••• X TCSL 1X CS CLK DI 00 1 1 X TCSL ••• CS CLK DI DO 11 0 An ••• A0 HIGH-Z 0Dx ••• D0 Dx ••• D0 ••• Dx D0 |
类似零件编号 - 93LC46B-ST |
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类似说明 - 93LC46B-ST |
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