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GS3440 数据表(PDF) 5 Page - Gennum Corporation

部件名 GS3440
功能描述  Automatic power-down on loss of signal
Download  23 Pages
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制造商  GENNUM [Gennum Corporation]
网页  http://www.gennum.com
标志 GENNUM - Gennum Corporation

GS3440 数据表(HTML) 5 Page - Gennum Corporation

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GS3440 Adaptive Cable Equalizer
Final Data Sheet
Rev. 2
December 2012
5 of 23
Proprietary and Confidential
7BYPASS
Not
Synchronous
Input
Core Bypass Control.
Please refer to the input logic parameter in the DC Electrical
Characteristics table for logic level threshold and compatibility. This
pin is a 2.5V input that is tolerant to 3.3V levels.
Forces the equalizer and DC-restore stages into Bypass mode when
HIGH. No equalization occurs in this mode.
This pin has an internal pull-down resistor.
8
SQ_ADJ
Analog
Input
Squelch Threshold Adjust.
Adjusts the input signal amplitude threshold of the carrier detect
function. The serial data output of the device can be muted when
the serial data input signal amplitude is too low by connecting the
CD and OP_CTL pins using a suitable resistor network (see Figure 4-2
and Figure 4-3).
This pin has an internal pull-down resistor.
Note: The SQ_ADJ function is only available when the device is not
in auto-sleep mode. Reference Section 4.5 for more detail.
9OP_CTL
Not
Synchronous
Input
Controls the Output Swing, De-emphasis and Mute Features of the
DDO/DDO outputs.
When this pin is connected to GND, the output swing is 850mVppd
with no de-emphasis applied to the output signal.
With this pin connected to 2.5V, the output is muted.
Intermediate voltages and functions are shown in Table 4-5. These
voltages can be achieved as shown in Figure 4-2 and Figure 4-3.
This pin has an internal pull-down resistor.
10, 11
DDO, DDO
Analog
Output
Serial digital differential output.
12
VEE_O
Analog
Power
Most negative power supply connection for the output buffer.
Connect to GND.
13
VCC_O
Analog
Power
Most positive power supply connection for the output buffer.
Connect to 1.2V - 3.3V DC.
14
SLEEP
Not
Synchronous
Input
SLEEP Control.
Please refer to the input logic parameter in the DC Electrical
Characteristics table for logic level threshold and compatibility. This
pin is a 2.5V input that is tolerant to 3.3V levels.
When HIGH the part is powered-down except for the Carrier Detect
function.
This pin can be connected directly to the CD pin to automatically
put the device to sleep (low-power operation) on loss of carrier.
This pin has an internal pull-down resistor.
Note: When SLEEP is connected to CD for automatic power
reduction on loss of carrier, the SQ_ADJ pin will not modify the CD
threshold. The CD threshold will revert to the default value used
when SQ_ADJ is pulled LOW.
Table 1-1: GS3440 Pin Descriptions (Continued)
Pin Number
Name
Timing
Type
Description


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