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29F1610A-10 数据表(PDF) 13 Page - Macronix International

部件名 29F1610A-10
功能描述  16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM
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制造商  MCNIX [Macronix International]
网页  http://www.macronix.com
标志 MCNIX - Macronix International

29F1610A-10 数据表(HTML) 13 Page - Macronix International

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P/N: PM0506
REV.1.7, JUN. 15, 2001
MX29F1610A
SECTOR UNPROTECT
It is also possible to unprotect the sector , same as the first
five write command cycles in activating sector protection
mode followed by the Unprotect Sector command - 40H,
the automatic Unprotect operation begins on the rising
edge of the last WE pulse in the command sequence and
terminates when the Status on DQ7 is '1' at which time the
device stays at the read status register mode.(Refer to
table 3,6 and Figure 11,12)
The users have to write Verify Sector Protect command
to verify protect status after executing Sector Unprotect.
The device remains enabled for read status register
mode until the CIR contents are altered by a valid
command sequence.
Either Protect or Unprotect sector mode is accomplished
by keeping WP high, i.e. protect-bit status can only be
changed with a valid command sequence and WP at high.
Protect-bit status will not be changed during chip/sector
erase operations.
Only unprotected sectors can be
programmed or erased regardless of the WP pin.
HARDWARE SECTOR PROTECTION
The MX29F1610A features sector protection. This feature
will disable both program and erase operations. The sector
protection feature is enabled using system software by the
user(Refer to table 3). The device is shipped with all
sectors unprotected. Alternatively, MXIC may protect all
sectors in the factory prior to shipping the device.
SECTOR PROTECTION
To activate this mode, a six-bus cycle operation is
required. There are two 'unlock' write cycles. These are
followed by writing the 'set-up' command. Two more
'unlock' write cycles are then followed by the Lock Sector
command - 20H. Sector address is latched on the falling
edge of CE or WE of the sixth cycle of the command
sequence. The automatic Lock operation begins on the
rising edge of the last
WE pulse in the command
sequence and terminates when the Status on DQ7 is '1'
at which time the device stays at the read status register
mode.
The users have to write Verify Sector Protect command
to verify protect status after executing Sector Protector.
The device remains enabled for read status register
mode until the CIR contents are altered by a valid
command sequence (Refer to table 3,6 and Figure 10,12
).
VERIFY SECTOR PROTECT
To verify the Protect status, operation is initiated by
writing Silicon ID read command into the command
register. Following the command write, a read cycle from
address XXX0H retrieves the Manufacturer code of C2H.
A read cycle from XXX1H returns the Device code FAH/
FBH. A read cycle from appropriate address returns
information as to which sectors are protected.
To
terminate the operation, it is necessary to write the read/
reset command sequence into the CIR.
(Refer to table 3,4 and Figure 12)
A few retries are required if Protect status can not be
verified successfully after each operation.
DEEP POWER-DOWN MODE
The MXIC's16 Mbit flash family supports a typical ICC of
1uA in deep power-down mode. One of the target markets
for these devices is in protable equipment where the
power consumption of the machine is of prime
importance. When PWD is a logic low (GND ± 0.2V), all
circuits are turned off and the device typically draws 1uA
of ICC current.
During erase or program modes, PWD low will abort
either erase or program operation. The contents of the
memory are no longer valid as the data has been
corrupted by the PWD function.
PWD transitions to VIL or turning power off to the device
will clear the status register.
PWD pin is not provided in 44-pin SOP package.


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