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DAC5670-SP 数据表(PDF) 8 Page - Texas Instruments

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部件名 DAC5670-SP
功能描述  DAC5670-SP 14-Bit 2.4-GSPS Digital-to-Analog Converter (DAC)
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

DAC5670-SP 数据表(HTML) 8 Page - Texas Instruments

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DAC5670-SP
SGLS386F – JANUARY 2009 – REVISED OCTOBER 2014
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
Supply voltage
AVDD to GND
5
V
DA_P[13..0], DA_N[13..0], DB_P[13..0], DB_N[13..0]
Measured with respect to GND
–0.3
AVDD + 0.3
V
NORMAL, A_ONLY, A_ONLY_INV, A_ONLY_ZS
Measured with respect to GND
–0.3
AVDD + 0.3
V
DTCLK_P, DTCLK_N, DACCLK_P, DACCLK_N
Measured with respect to GND
–0.3
AVDD + 0.3
V
LVDS_HTB, INV_CLK, RESTART
Measured with respect to GND
–0.3
AVDD + 0.3
V
IOUT_P, IOUT_N
Measured with respect to GND
AVDD – 0.5
AVDD + 1.5
V
CSCAP_IN, REFIO_IN, RBIAS_IN
Measured with respect to GND
–0.3
AVDD + 0.3
V
Peak input current (any input)
20
mA
Maximum junction temperature
150
°C
Lead temperature 1.6 mm (1/16 inch) from the case for 10 s
260
°C
(1)
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 Handling Ratings
MIN
MAX
UNIT
Tstg
Storage temperature range
–65
150
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
–250
250
Electrostatic
V(ESD)
V
discharge
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)
–250
250
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
GENERAL PARAMETERS
Full-scale output current
30
mA
VREFIO
Input voltage range
1.14
1.2
1.26
V
AVDD
Analog supply voltage
3
3.3
3.6
V
ƒDAC
Output update rate
2.4
GSPS
CMOS INTERFACE (SLEEP, RESTART, INV_CLK, NORMAL, A_ONLY, A_ONLY_INV, A_ONLY_ZS)
VIH
High-level input voltage
2
3
V
VIL
Low-level input voltage
0
0
0.8
V
DIFFERENTIAL DATA INTERFACE (DA_P[13:0], DA_N[13:0], DB_P[13:0], DB_N[13:0], DTCLK_P, DTCLK_N)
VITH
Differential input threshold
–100
100
mV
VICOM
Input common mode
0.6
1.4
V
CLOCK INPUTS (DACCLK_P, DACCLK_N)
|DACCLK_P
Clock differential input voltage
200
1000
mV
DACCLK_N|
Clock duty cycle
40%
60%
VCLKCM
Clock common mode
1
1.4
V
8
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Product Folder Links: DAC5670-SP


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