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LTC4221 数据表(PDF) 19 Page - Linear Technology |
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LTC4221 数据表(HTML) 19 Page - Linear Technology |
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19 / 28 page  19 LTC4221 4221fa latch is cleared and the FAULT pin sources a 3.8 μA pull-up current to charge up CON1. The typical delay tON is : tV V C A ON ON = () μ 0 851 0 4 38 1 .– . • . (3) As shown in the timing diagram of Figure 11, the autoretry circuitry will attempt to restart the LTC4221 with a duty cycle: Duty Cycle = tSTARTUP + () ++ + t tt t t FILTER ON INITIAL STARTUP FILTER •% 100 (4) tFILTER is defined in Equation 1 and tON is defined in Equa- tion 3. tINITIAL, the initial timing cycle delay, is given in Equation 9 located in the Initial Timing Cycle section. tSTARTUP, the start-up cycle delay, is given in Equation 10 and found in the Start-Up Cycle Without Current Limit section. Using the capacitor values as shown in Figure 10, the Autoretry Duty cycle works out to be approximately 6%. Sense Resistor Consideration The fault current level at which the LTC4221’s internal electronic circuit breaker trips is determined by sense resistors connected between each channel’s VCC and SENSE pins. For both channels, the slow comparator trip current and the fast comparator trip current are given by equations (5) and (6) respectively. I V R mV R TRIP SC SENSE SC SENSE SENSE () () == 25 (5) I V R mV R TRIP FC SENSE FC SENSE SENSE () () == 100 (6) The power rating of the sense resistor should be rated at the fault current level. Table 1 in the Appendix lists some common sense resistors. For proper circuit breaker operation, Kelvin-sense PCB connections between the sense resistor and each channel’s VCC and SENSE pins are strongly recommended. The drawing in Figure 12 illustrates the connections between the LTC4221 and the sense resistor. PCB layout should be balanced and symmetrical to minimize wiring errors. In addition, the PCB layout for the sense resistor should include good thermal management techniques for optimal sense resistor power dissipation. Calculating Current Limit For a selected RSENSE, the load current must not exceed ITRIP(SC). The minimum ITRIP(SC) is given by Equation 7: I V R mV R TRIP SCMIN SENSE SCMIN SENSE MAX SENSE MAX () () () () . == 20 5 (7) where RR R SENSE MAX SENSE TOL () • =+ ⎛ ⎝⎜ ⎞ ⎠⎟ 1 100 The maximum ITRIP(SC) is given by Equation 8: I V R mV R TRIP SCMAX SENSE SCMAX SENSE MIN SENSE MIN () () () () . == 29 5 (8) where RR R SENSE MIN SENSE TOL () •– = ⎛ ⎝⎜ ⎞ ⎠⎟ 1 100 If a 7m Ω sense resistor with ±1% tolerance is used for current limiting, the nominal slow comparator trip current is 3.57A. From Equations 7 and 8, ITRIP(SCMIN) = 2.9A and ITRIP(SCMAX) = 4.26A. For proper operation, the minimum ITRIP(SC) must exceed the circuit maximum operating load current. For reliability purposes, the operation at the maximum trip current must be evaluated carefully. If necessary, two resistors with the same RTOL can be connected in parallel to yield a nominal RSENSE value that fits the circuit requirements. APPLICATIO S I FOR ATIO SENSE RESISTOR TO VCCn TO SENSE n CURRENT FLOW TO LOAD CURRENT FLOW TO LOAD TRACK WIDTH W: 0.03" PER AMP ON 1oz COPPER W 4221 F12 Figure 12. PCB Connections to the Sense Resistor |
类似零件编号 - LTC4221_15 |
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类似说明 - LTC4221_15 |
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