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LTC2327-18 数据表(PDF) 11 Page - Linear Technology

部件名 LTC2327-18
功能描述  True Bipolar, Pseudo-Differential Input ADC with 95dB SNR
Download  26 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC2327-18 数据表(HTML) 11 Page - Linear Technology

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LTC2327-18
11
232718fa
For more information www.linear.com/LTC2327-18
applicaTions inForMaTion
OVERVIEw
The LTC2327-18 is a low noise, high speed 18-bit suc-
cessive approximation register (SAR) ADC with pseudo-
differential inputs. Operating from a single 5V supply,
the LTC2327-18 has a ±10.24V true bipolar input range,
making it ideal for high voltage applications which require
a wide dynamic range. The LTC2327-18 achieves ±5LSB
INLmaximum,nomissingcodesat18-bitsand95dBSNR.
The LTC2327-18 has an onboard single-shot capable
reference buffer and low drift (20ppm/°C max) 2.048V
temperature-compensated reference. The LTC2327-18
also has a high speed SPI-compatible serial interface that
supports1.8V,2.5V,3.3Vand5Vlogicwhilealsofeaturing
a daisy-chain mode. The fast 500ksps throughput with
no cycle latency makes the LTC2327-18 ideally suited
for a wide variety of high speed applications. An internal
oscillator sets the conversion time, easing external timing
considerations. The LTC2327-18 dissipates only 36mW
and automatically naps between conversions, leading to
reduced power dissipation that scales with the sampling
rate. A sleep mode is also provided to reduce the power
consumption of the LTC2327-18 to 300μW for further
power savings during inactive periods.
CONVERTER OPERATION
The LTC2327-18 operates in two phases. During the
acquisition phase, the charge redistribution capacitor
D/A converter (CDAC) is connected to the outputs of
the resistor divider networks that pins IN+ and INdrive
to sample an attenuated and level-shifted version of the
pseudo-differential analog input voltage as shown in Fig-
ure 3. A rising edge on the CNV pin initiates a conversion.
Duringtheconversionphase,the18-bitCDACissequenced
throughasuccessiveapproximationalgorithm,effectively
comparing the sampled input with binary-weighted frac-
tions of the reference voltage (e.g. VREFBUF/2, VREFBUF/4
… VREFBUF/262144) using the differential comparator. At
the end of conversion, the CDAC output approximates the
sampledanaloginput.TheADCcontrollogicthenprepares
the 18-bit digital output code for serial transfer.
Figure 2. LTC2327-18 Transfer Function
TRANSFER FUNCTION
The LTC2327-18 digitizes the full-scale voltage of ±2.5 •
REFBUF into 218 levels, resulting in an LSB size of 78µV
withREFBUF=4.096V.Theidealtransferfunctionisshown
in Figure 2. The output data is in 2’s complement format.
ANALOG INPUT
The analog inputs of the LTC2327-18 are pseudo-differen-
tial in order to reduce any unwanted signal that is common
to both inputs. The analog inputs can be modeled by the
equivalent circuit shown in Figure 3. The back-to-back
diodes at the inputs form clamps that provide ESD protec-
tion. Each input drives a resistor divider network that has
INPUT VOLTAGE (V)
0V
–1
LSB
232718 F02
011...111
011...110
000...001
000...000
100...000
100...001
111...110
1
LSB
BIPOLAR
ZERO
111...111
FSR/2 – 1LSB
–FSR/2
FSR = +FS – –FS
1LSB = FSR/262144
Figure 3. The Equivalent Circuit for the Differential
Analog Input of the LTC2327-18
RON
50
400
CIN
45pF
RON
50
0.63 • VREFBUF
CIN
45pF
IN+
IN
BIAS
VOLTAGE
1.6k
1.6k
400
0.63 • VREFBUF
232718 F03


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