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LTC1430

G1 (Pin 1/Pin 1): Driver Output 1. Connect this pin to the

gate of the upper N-channel MOSFET, M1. This output will

is high.

power supply input for G1. G1 will swing from PGND to

using an external supply or a simple charge pump con-

nected to the switching node between the upper MOSFET

and the lower MOSFET; see Applications Information for

details.

PGND (Pin 3/Pin 3): Power Ground. Both drivers return to

this pin. It should be connected to a low impedance ground

in close proximity to the source of M2. 8-lead parts have

PGND and GND tied together at pin 3.

GND (Pin 4/Pin 3): Signal Ground. All low power internal

circuitry returns to this pin. To minimize regulation errors

due to ground currents, GND should be connected to

PGND right at the LTC1430. 8-lead parts have PGND and

GND tied together internally at pin 3.

pins connect to the internal resistor divider and to the

internal feedback node. To use the internal divider to set

tive terminal. FB should be left floating in applications that

use the internal divider. To use an external resistor divider

connect the external resistor divider to FB.

SHDN (Pin 8/Pin 5): Shutdown. A TTL compatible low

level at SHDN for longer than 50

µs puts the LTC1430 into

shutdown mode. In shutdown, G1 and G2 go low, all

internal circuits are disabled and the quiescent current

drops to 10

µA max. A TTL compatible high level at SHDN

allows the part to operate normally.

SS (Pin 9/NA): Soft-Start. The SS pin allows an external

capacitor to be connected to implement a soft-start func-

tion. An external capacitor from SS to ground controls the

start-up time and also compensates the current limit loop,

allowing the LTC1430 to enter and exit current limit

cleanly. See Applications Information for more details.

COMP (Pin 10/Pin 6): External Compensation. The COMP

pin is connected directly to the output of the error amplifier

and the input of the PWM. An RC network is used at this

node to compensate the feedback loop to provide opti-

mum transient response. See Applications Information for

compensation details.

FREQSET (Pin 11/NA): Frequency Set. This pin is used to

set the free running frequency of the internal oscillator.

With the pin floating, the oscillator runs at about 200kHz.

A resistor from FREQSET to ground will speed up the

tions Information for resistor selection details.

source.

switched node at the source of M1 and the drain of M2

through a 1k resistor. The 1k resistor is required to prevent

taken up to 18V above GND without damage.

circuits draw their supply from this pin. Connect to a clean

drain of M1. This pin requires a 4.7

µF bypass capacitor.

require a 10

µF bypass to GND.

power supply input for G2. G2 will swing from GND to

at pin 7 and require a 10

µF bypass to GND.

G2 (Pin 16/Pin 8): Driver Output 2. Connect this pin to the

gate of the lower N-channel MOSFET, M2. This output will

is high.

(16-Lead Package/8-Lead Package)

PI FU CTIO S