LTC1272

16

S

APPLICATI

I FOR ATIO

DATA BUS

LTC1272 • TA20

ADDRESS BUS

D0

D11

R/W

DTACK

AS

A1

A23

MC68000

ADDRESS

DECODE

EN

D0/8

D11

RD

BUSY

CS

HBEN

LTC1272

ADDITIONAL PINS OMITTED FOR CLARITY

Figure 18. LTC1272 MC68000 Interface

is accomplished with the single 16-bit Load instruction

below.

For the 8085A

LHLD (B000)

For the Z80

LDHL, (B000)

This is a two byte read instruction which loads the ADC

data (address B000) into the HL register pair. During the

first read operation, BUSY forces the microprocessor to

Wait for the LTC1272 conversion. No Wait states are

inserted during the second read operation when the mi-

croprocessor is reading the high data byte.

TMS32010 Microcomputer

Figure 20 shows an LTC1272 TMS32010 interface. The

LTC1272 is operating in the ROM Mode. The interface is

designed for a maximum TMS32010 clock frequency of

18MHz but will typically work over the full TMS32010

clock frequency range.

The LTC1272 is mapped at a port address. The following

I/O instruction starts a conversion and reads the previous

conversion result into data memory.

IN A,PA

(PA = PORT ADDRESS)

When conversion is complete, a second I/O instruction

reads the up-to-date data into memory and starts another

conversion. A delay at least as long as the ADC conversion

time must be allowed between I/O instructions.

At the beginning of the instruction cycle when the ADC

address is selected, BUSY and CS assert DTACK, so that

the MC68000 is forced into a Wait state. At the end of

conversion BUSY returns high and the conversion result

is placed in the D0 register of the microprocessor.

8085A, Z80 Microprocessor

Figure 19 shows a LTC1272 interface for the Z80 and

8085A. The LTC1272 is operating in the Slow Memory

Mode and a two byte read is required. Not shown in the

figure is the 8-bit latch required to demultiplex the 8085A

common address/data bus. A0 is used to assert HBEN, so

that an even address (HBEN = LOW) to the LTC1272 will

start a conversion and read the low data byte. An odd

address (HBEN = HIGH) will read the high data byte. This

DATA BUS

LTC1272 • TA21

ADDRESS BUS

D0

D7

RD

WAIT

MREQ

A0

A15

Z80

8085A

ADDRESS

DECODE

EN

D0/8

D7

RD

BUSY

CS

HBEN

LINEAR CIRCUITRY OMITTED FOR CLARITY

LTC1272

A0

Figure 19. LTC1272 8085A/Z80 Interface

DATA BUS

LTC1272 • TA22

PORT ADDRESS BUS

D0

D11

DEN

PA0

PA2

TMS32010

ADDRESS

DECODE

EN

D0/8

D11

RD

CS

HBEN

LTC1272

LINEAR CIRCUITRY OMITTED FOR CLARITY

Figure 20. LTC1272 TMS32010 Interface