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LTC1098LC 数据表(PDF) 6 Page - Linear Technology |
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LTC1098LC 数据表(HTML) 6 Page - Linear Technology |
6 / 8 page 6 LTC1096L/LTC1098L TEST CIRCUITS Voltage Waveforms for ten LTC1096/98 • TC06 CS tWAKEUP LTC1096L 1 CLK DOUT ten B7 VOL 123 4 5 LTC1098L DIN CLK DOUT START ten B7 LTC1096/98 • TC07 CS VOL S APPLICATI I FOR ATIO INPUT DATA WORD The LTC1096L requires no DIN word. It is permanently configured to have a single differential input. The conver- sion result, in which the output on the DOUT line is presented in MSB-first sequence followed by LSB se- quence, provides easy interface to MSB- or LSB-first serial ports. The LTC1098L latches data into the DIN input on the rising edge of the clock. The input data words are defined as follows: Start Bit The first “logical one” clocked into the DIN input after CS goes low is the start bit. The start bit initiates the data transfer. The LTC1098L will ignore all leading zeroes which precede this logical one. After the start bit is received, the remaining bits of the input word will be clocked in. Further inputs on the DIN pin are then ignored until the next CS cycle. Multiplexer (MUX) Address The bits of the input word following the START bit assign the MUX configuration for the requested conversion. For a given channel selection, the converter will measure the voltage between the two channels indicated by the “+” and “–” signs in the selected row of the following tables. In SGL/ DIFF ODD/ SIGN MSBF START MUX ADDRESS MSB-FIRST/ LSB-FIRST LTC1096/9 • AI01 |
类似零件编号 - LTC1098LC |
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类似说明 - LTC1098LC |
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