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MACHLV210-12 数据表(PDF) 3 Page - Lattice Semiconductor

部件名 MACHLV210-12
功能描述  High Density EE CMOS Programmable Logic
Download  29 Pages
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制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor

MACHLV210-12 数据表(HTML) 3 Page - Lattice Semiconductor

  MACHLV210-12 Datasheet HTML 1Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 2Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 3Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 4Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 5Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 6Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 7Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 8Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 9Page - Lattice Semiconductor Next Button
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3
MACHLV210-12/15/20
CONNECTION DIAGRAM
Top View
PLCC
17908D-2
I/O5
I/O6
I/O7
I0
I1
CLK0/I2
I/O8
I/O9
GND
I/O10
I/O11
I/O27
I/O26
I/O25
I3
I4
I/O24
CLK1/I5
GND
I/O23
I/O22
I/O21
7
8
9
10
11
12
13
15
16
14
17
5
61
32
4
44 43 424140
29
30
31
32
33
34
35
36
37
38
39
18
28
27
26
25
24
23
22
21
19 20
PIN DESIGNATIONS
CLK/I = Clock or Input
GND = Ground
I
= Input
I/O
= Input/Output
VCC
= Supply Voltage
Note:
Pin-compatible with MACH110, MACH111, MACH210, MACH211, and MACH215.


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