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MACHLV210-12 数据表(PDF) 2 Page - Lattice Semiconductor

部件名 MACHLV210-12
功能描述  High Density EE CMOS Programmable Logic
Download  29 Pages
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制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor

MACHLV210-12 数据表(HTML) 2 Page - Lattice Semiconductor

  MACHLV210-12 Datasheet HTML 1Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 2Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 3Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 4Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 5Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 6Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 7Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 8Page - Lattice Semiconductor MACHLV210-12 Datasheet HTML 9Page - Lattice Semiconductor Next Button
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2
MACHLV210-12/15/20
BLOCK DIAGRAM
Switch Matrix
I/O Cells
Macrocells
I/O Cells
Macrocells
8
8
8
I/O Cells
Macrocells
I/O0–I/O7
Macrocells
I/O Cells
Macrocells
8
8
8
8
8
8
8
8
8
I0–I1,
I3–I4
I/O8–I/O15
2
I/O16–I/O23
CLK0/I2,
CLK1/I5
I/O24–I/O31
17908D-1
44 x 68
AND Logic Array
and
Logic Allocator
22
22
22
22
44 x 68
AND Logic Array
and
Logic Allocator
4
2
8
44 x 68
AND Logic Array
and
Logic Allocator
44 x 68
AND Logic Array
and
Logic Allocator
8
2
OE
Macrocells
8
8
Macrocells
Macrocells
OE
OE
OE


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