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UPD4564323G5-A10B-9JH 数据表(PDF) 20 Page - NEC |
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UPD4564323G5-A10B-9JH 数据表(HTML) 20 Page - NEC |
20 / 84 page Data Sheet M14376EJ2V0DS00 20 µµµµPD4564323 for Rev. E 7. Mode Register WT = 1 1 2 4 8 R R R R 1 0 0 0 0 A0 A1 A2 A3 A4 A5 A7 A6 A8 A9 A10 BA0 JEDEC Standard Test Set (refresh counter test) BL WT LTMODE 0 0 1 x x A0 A1 A2 A3 A4 A5 A7 A6 A8 A9 A10 BA0 Burst Read and Single Write (for Write Through Cache) 0 1 A0 A1 A2 A3 A4 A5 A7 A6 A8 A9 A10 BA0 Use in future V V V V V V 1V 1 x x x A0 A1 A2 A3 A4 A5 A7 A6 A8 A9 A10 BA0 Vender Specific BL WT LTMODE 0 0 0 0 0 A0 A1 A2 A3 A4 A5 A7 A6 A8 A9 A10 BA0 Mode Register Set V = Valid x = Don’ t care WT = 0 1 2 4 8 R R R Full page Bits2-0 000 001 010 011 100 101 110 111 Burst length Sequential Interleave 0 1 Wrap type /CAS latency R R 2 3 R R R R Bits6-4 000 001 010 011 100 101 110 111 Latency mode 0 BA1 x BA1 BA1 x BA1 0 BA1 Remark R : Reserved Mode Register Set Timing CLK CKE /CS /RAS /CAS /WE A0 - A10, BA0, BA1 Mode Register Set |
类似零件编号 - UPD4564323G5-A10B-9JH |
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类似说明 - UPD4564323G5-A10B-9JH |
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