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HUF76129D3 Datasheet(数据表) 6 Page - Intersil Corporation |
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HUF76129D3 Datasheet(HTML) 6 Page - Intersil Corporation |
6 page ![]() 6 FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Intersil Application Notes 7254 and 7260. FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT FIGURE 15. SWITCHING TIME vs GATE RESISTANCE FIGURE 16. SWITCHING TIME vs GATE RESISTANCE Test Circuits and Waveforms FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS Typical Performance Curves (Continued) 2000 1200 0 0 101520 1600 VDS, DRAIN TO SOURCE VOLTAGE (V) 800 CISS COSS CRSS 30 400 5 25 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 10 8 6 4 0 VDD = 15V 2 30 0 Qg, GATE CHARGE (nC) 10 ID = 20A ID = 10A ID = 2A WAVEFORMS IN DESCENDING ORDER: 20 40 200 20 30 40 50 0 500 400 300 0 10 RGS, GATE TO SOURCE RESISTANCE (Ω) 100 td(OFF) td(ON) tr tf VGS = 4.5V, VDD = 15V, ID = 20A, RL= 0.75Ω 100 20 30 40 50 0 300 200 150 0 10 RGS, GATE TO SOURCE RESISTANCE (Ω) td(OFF) td(ON) tr tf VGS = 10V, VDD = 15V, ID = 20A, RL= 0.75Ω 50 250 tP VGS 0.01 Ω L IAS + - VDS VDD RG DUT VARY tP TO OBTAIN REQUIRED PEAK IAS 0V VDD VDS BVDSS tP IAS tAV 0 HUF76129D3, HUF76129D3S |