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CA3338AD 数据表(PDF) 5 Page - Intersil Corporation |
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CA3338AD 数据表(HTML) 5 Page - Intersil Corporation |
5 / 7 page 10-15 Latch Operation Data is fed from input to output while LE is low: LE should be tied low for non-clocked operation. Non-clocked operation or changing data while LE is low is not recommended for applications requiring low output “glitch” energy: there is no guarantee of the simultaneous changing of input data or the equal propagation delay of all bits through the converter. Several parameters are given if the converter is to be used in either of these modes: tD2 gives the delay from the input changing to the output chang- ing (10%), while tSU2 and tH give the set up and hold times (referred to LE rising edge) needed to latch data. See Figures 1 and 2. Clocked operation is needed for low “glitch” energy use. Data must meet the given tSU1 set up time to the LE falling edge, and the tH hold time from the LE rising edge. The delay to the output changing, tD1, is now referred to the LE falling edge. There is no need for a square wave LE clock; LE must only meet the minimum tW pulse width for successful latch opera- tion. Generally, output timing (desired accuracy of settling) sets the upper limit of usable clock frequency. Output Structure The latches feed data to a row of high current CMOS drivers, which in turn feed a modified R2R ladder network. The “N” channel (pull down) transistor of each driver plus the bottom “2R” resistor are returned to VREF- this is the (-) full- scale reference. The “P” channel (pull up) transistor of each driver is returned to VREF+, the (+) full-scale reference. In unipolar operation, VREF- would typically be returned to analog ground, but may be raised above ground (see specifi- cations). There is substantial code dependent current that flows from VREF+ to VREF- (see VREF+ input current in specifications), so VREF- should have a low impedance path to ground. In bipolar operation, VREF- would be returned to a negative voltage (the maximum voltage rating to VDD must be observed). VEE, which supplies the gate potential for the output drivers, must be returned to a point at least as nega- tive as VREF-. Note that the maximum clocking speed decreases when the bipolar mode is used. Static Characteristics The ideal 8-bit D/A would have an output equal to VREF- with an input code of 00HEX (zero scale output), and an output equal to 255/256 of VREF+ (referred to VREF-) with an input code of FFHEX (full scale output). The difference between the ideal and actual values of these two parameters are the OFF- SET and GAIN errors, respectively; see Figure 3. If the code into an 8-bit D/A is changed by 1 count, the output should change by 1/255 (full scale output - zero scale output). A deviation from this step size is a differential linearity error, see Figure 4. Note that the error is expressed in fractions of the ideal step size (usually called an LSB). Also note that if the (-) differential linearity error is less (in absolute numbers) than 1 LSB, the device is monotonic. (The output will always increase for increasing code or decrease for decreasing code). If the code into an 8-bit D/A is at any value, say “N”, the output voltage should be N/255 of the full scale output (referred to the zero scale output). Any deviation from that output is an integral linearity error, usually expressed in LSBs. See Figure 4. Note that OFFSET and GAIN errors do not affect integral linearity, as the linearity is referenced to actual zero and full scale outputs, not ideal. Absolute accuracy would have to also take these errors into account. INPUT DATA LATCH tSU1 tSU2 tW tH ENABLE LATCHED LATCHED DATA FEEDTHROUGH FIGURE 1. DATA TO LATCH ENABLE TIMING tD1 tD2 tr tS 1/ 2 LSB 1/ 2 LSB 90% 10% INPUT LATCH ENABLE OUTPUT VOLTAGE DATA FIGURE 2. DATA AND LATCH ENABLE TO OUTPUT TIMING 255/256 254/256 253/256 3/256 2/256 1/256 0 00 01 02 03 FD FE FF = IDEAL TRANSFER CURVE = ACTUAL TRANSFER CURVE OFFSET ERROR (SHOWN +) GAIN ERROR (SHOWN -) INPUT CODE IN HEXADECIMAL (COMP = LOW) FIGURE 3. D/A OFFSET AND GAIN ERROR CA3338, CA3338A |
类似零件编号 - CA3338AD |
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类似说明 - CA3338AD |
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