数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD6654 数据表(PDF) 10 Page - Analog Devices

部件名 AD6654
功能描述  14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
Download  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6654 数据表(HTML) 10 Page - Analog Devices

Back Button AD6654_15 Datasheet HTML 6Page - Analog Devices AD6654_15 Datasheet HTML 7Page - Analog Devices AD6654_15 Datasheet HTML 8Page - Analog Devices AD6654_15 Datasheet HTML 9Page - Analog Devices AD6654_15 Datasheet HTML 10Page - Analog Devices AD6654_15 Datasheet HTML 11Page - Analog Devices AD6654_15 Datasheet HTML 12Page - Analog Devices AD6654_15 Datasheet HTML 13Page - Analog Devices AD6654_15 Datasheet HTML 14Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 88 page
background image
AD6654
Rev. 0 | Page 10 of 88
MICROPORT TIMING CHARACTERISTICS
Table 8.
Parameter1, 2
Temp
Test Level
Min
Typ
Max
Unit
MICROPORT CLOCK TIMING REQUIREMENTS
tCPUCLK
CPUCLK Period
Full
IV
10.0
ns
tCPUCLKL
CPUCLK Low Time
Full
IV
1.53
0.5 × tCPUCLK
ns
tCPUCLKH
CPUCLK High Time
Full
IV
1.70
0.5 × tCPUCLK
ns
INM MODE WRITE TIMING (MODE = 0)
tSC
Control3 to
↑CPUCLK Setup Time
Full
IV
0.80
ns
tHC
Control3 to
↑CPUCLK Hold Time
Full
IV
0.09
ns
tSAM
Address/Data to
↑CPUCLK Setup Time
Full
IV
0.76
ns
tHAM
Address/Data to
↑CPUCLK Hold Time
Full
IV
0.20
ns
tDRDY
↑CPUCLK to RDY (DTACK) Delay
Full
IV
3.51
6.72
ns
tACC
Write Access Time
Full
IV
3 × tCPUCLK
9 × tCPUCLK
ns
INM MODE READ TIMING (MODE = 0)
tSC
Control3 to
↑CPUCLK Setup Time
Full
IV
1.00
ns
tHC
Control3 to
↑CPUCLK Hold Time
Full
IV
0.03
ns
tSAM
Address to
↑CPUCLK Setup Time
Full
IV
0.80
ns
tHAM
Address to
↑CPUCLK Hold Time
Full
IV
0.20
ns
tDD
↑CPUCLK to Data Delay
Full
V
5.0
ns
tDRDY
↑CPUCLK to RDY (DTACK) Delay
Full
IV
4.50
6.72
ns
tACC
Read Access Time
Full
IV
3 × tCPUCLK
9 × tCPUCLK
ns
MNM MODE WRITE TIMING (MODE = 1)
tSC
Control3 to
↑CPUCLK Setup Time
Full
IV
1.00
ns
tHC
Control3 to
↑CPUCLK Hold Time
Full
IV
0.00
ns
tSAM
Address/Data to
↑CPUCLK Setup Time
Full
IV
0.00
ns
tHAM
Address/Data to
↑CPUCLK Hold Time
Full
IV
0.57
ns
tDDTACK
↑CPUCLK to DTACK (RDY) Delay
Full
IV
4.10
5.72
ns
tACC
Write Access Time
Full
IV
3 × tCPUCLK
9 × tCPUCLK
ns
MNM MODE READ TIMING (MODE = 1)
tSC
Control3 to
↑CPUCLK Setup Time
Full
IV
1.00
ns
tHC
Control3 to
↑CPUCLK Hold Time
Full
IV
0.00
ns
tSAM
Address to
↑CPUCLK Setup Time
Full
IV
0.00
ns
tHAM
Address to
↑CPUCLK Hold Time
Full
IV
0.57
ns
tDD
CPUCLK to Data Delay
Full
V
5.0
ns
tDDTACK
↑CPUCLK to DTACK (RDY) Delay
Full
IV
4.20
6.03
ns
tACC
Read Access Time
Full
IV
3 × tCPUCLK
9 × tCPUCLK
ns
1 All timing specifications are valid over the VDDCORE range of 1.7 V to 1.9 V, and the VDDIO range of 3.0 V to 3.6 V.
2 CLOAD = 40 pF on all outputs, unless otherwise noted.
3 Specification pertains to control signals: R/W, (WR), DS, (RD), and CS.


类似零件编号 - AD6654_15

制造商部件名数据表功能描述
logo
Analog Devices
AD6654/PCB AD-AD6654/PCB Datasheet
1Mb / 88P
   14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
REV. 0
AD6654BBC AD-AD6654BBC Datasheet
1Mb / 88P
   14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
REV. 0
AD6654BBCZ AD-AD6654BBCZ Datasheet
1Mb / 88P
   14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
REV. 0
AD6654CBC AD-AD6654CBC Datasheet
1Mb / 88P
   14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
REV. 0
AD6654CBCZ AD-AD6654CBCZ Datasheet
1Mb / 88P
   14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
REV. 0
More results

类似说明 - AD6654_15

制造商部件名数据表功能描述
logo
Analog Devices
AD6654 AD-AD6654 Datasheet
1Mb / 88P
   14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
REV. 0
logo
Linear Technology
LTM9002 LINER-LTM9002_15 Datasheet
352Kb / 28P
   14-Bit Dual-Channel IF/ Baseband Receiver Subsystem
LTM9002 LINER-LTM9002 Datasheet
354Kb / 28P
   14-Bit Dual-Channel IF/Baseband Receiver Subsystem
logo
Analog Devices
AD6652 AD-AD6652 Datasheet
1Mb / 76P
   12-Bit, 65 MSPS IF to Baseband Diversity Receiver
REV. 0
AD6652 AD-AD6652_15 Datasheet
1Mb / 76P
   12-Bit, 65 MSPS IF to Baseband Diversity Receiver
REV. 0
logo
Texas Instruments
AFE8406IZDQ TI-AFE8406IZDQ Datasheet
3Mb / 151P
[Old version datasheet]   14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER
AFE8406 TI-AFE8406 Datasheet
5Mb / 138P
[Old version datasheet]   14-Bit, 85 MSPS Dual ADC, 8-Channel Wideband Receiver
AFE8405 TI-AFE8405 Datasheet
3Mb / 152P
[Old version datasheet]   14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER
logo
Linear Technology
LTM9001-AX LINER-LTM9001-AX_10 Datasheet
855Kb / 30P
   16-Bit IF/Baseband Receiver Subsystem
LTM9001-BX LINER-LTM9001-BX_15 Datasheet
860Kb / 30P
   16-Bit IF/Baseband Receiver Subsystem
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com