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AD6654 数据表(PDF) 10 Page - Analog Devices |
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AD6654 数据表(HTML) 10 Page - Analog Devices |
10 / 88 page AD6654 Rev. 0 | Page 10 of 88 MICROPORT TIMING CHARACTERISTICS Table 8. Parameter1, 2 Temp Test Level Min Typ Max Unit MICROPORT CLOCK TIMING REQUIREMENTS tCPUCLK CPUCLK Period Full IV 10.0 ns tCPUCLKL CPUCLK Low Time Full IV 1.53 0.5 × tCPUCLK ns tCPUCLKH CPUCLK High Time Full IV 1.70 0.5 × tCPUCLK ns INM MODE WRITE TIMING (MODE = 0) tSC Control3 to ↑CPUCLK Setup Time Full IV 0.80 ns tHC Control3 to ↑CPUCLK Hold Time Full IV 0.09 ns tSAM Address/Data to ↑CPUCLK Setup Time Full IV 0.76 ns tHAM Address/Data to ↑CPUCLK Hold Time Full IV 0.20 ns tDRDY ↑CPUCLK to RDY (DTACK) Delay Full IV 3.51 6.72 ns tACC Write Access Time Full IV 3 × tCPUCLK 9 × tCPUCLK ns INM MODE READ TIMING (MODE = 0) tSC Control3 to ↑CPUCLK Setup Time Full IV 1.00 ns tHC Control3 to ↑CPUCLK Hold Time Full IV 0.03 ns tSAM Address to ↑CPUCLK Setup Time Full IV 0.80 ns tHAM Address to ↑CPUCLK Hold Time Full IV 0.20 ns tDD ↑CPUCLK to Data Delay Full V 5.0 ns tDRDY ↑CPUCLK to RDY (DTACK) Delay Full IV 4.50 6.72 ns tACC Read Access Time Full IV 3 × tCPUCLK 9 × tCPUCLK ns MNM MODE WRITE TIMING (MODE = 1) tSC Control3 to ↑CPUCLK Setup Time Full IV 1.00 ns tHC Control3 to ↑CPUCLK Hold Time Full IV 0.00 ns tSAM Address/Data to ↑CPUCLK Setup Time Full IV 0.00 ns tHAM Address/Data to ↑CPUCLK Hold Time Full IV 0.57 ns tDDTACK ↑CPUCLK to DTACK (RDY) Delay Full IV 4.10 5.72 ns tACC Write Access Time Full IV 3 × tCPUCLK 9 × tCPUCLK ns MNM MODE READ TIMING (MODE = 1) tSC Control3 to ↑CPUCLK Setup Time Full IV 1.00 ns tHC Control3 to ↑CPUCLK Hold Time Full IV 0.00 ns tSAM Address to ↑CPUCLK Setup Time Full IV 0.00 ns tHAM Address to ↑CPUCLK Hold Time Full IV 0.57 ns tDD CPUCLK to Data Delay Full V 5.0 ns tDDTACK ↑CPUCLK to DTACK (RDY) Delay Full IV 4.20 6.03 ns tACC Read Access Time Full IV 3 × tCPUCLK 9 × tCPUCLK ns 1 All timing specifications are valid over the VDDCORE range of 1.7 V to 1.9 V, and the VDDIO range of 3.0 V to 3.6 V. 2 CLOAD = 40 pF on all outputs, unless otherwise noted. 3 Specification pertains to control signals: R/W, (WR), DS, (RD), and CS. |
类似零件编号 - AD6654_15 |
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类似说明 - AD6654_15 |
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