数据搜索系统,热门电子元器件搜索
  Chinese  ▼

Delete All
ON OFF
ALLDATASHEETCN.COM

X  

预览 PDF Download HTML

M82380 数据表(PDF) 4 Page - Intel Corporation

部件名 M82380
功能描述  HIGH PERFORMANCE 32-BIT DMA CONTROLLER WITH INTEGRATED SYSTEM SUPPORT PERIPHERALS
Download  134 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

M82380 数据表(HTML) 4 Page - Intel Corporation

  M82380 Datasheet HTML 1Page - Intel Corporation M82380 Datasheet HTML 2Page - Intel Corporation M82380 Datasheet HTML 3Page - Intel Corporation M82380 Datasheet HTML 4Page - Intel Corporation M82380 Datasheet HTML 5Page - Intel Corporation M82380 Datasheet HTML 6Page - Intel Corporation M82380 Datasheet HTML 7Page - Intel Corporation M82380 Datasheet HTML 8Page - Intel Corporation M82380 Datasheet HTML 9Page - Intel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 134 page
background image
M82380
CONTENTS
PAGE
50 PROGRAMMABLE INTERVAL TIMER
71
51 Functional Description
71
511 Internal Architecture
72
52 Interface Signals
73
521 CLKIN
73
522 TOUT1 TOUT2 TOUT3
73
523 GATE
73
53 Modes of Operation
74
531 Mode 0Interrupt on Terminal Count
74
532 Mode 1Gate Retriggerable One-Shot
74
533 Mode 2Rate Generator
76
534 Mode 3Square Wave Generator
77
535 Mode 4Initial Count Triggered Strobe
79
536 Mode 5Gate Retriggerable Strobe
80
537 Operation Common to All Modes
81
54 Register Set Overview
81
541 Counter 0 1 2 3 Registers
82
542 Control Word RegisterIII
82
55 Programming
82
551 Initialization
82
552 Read Operation
82
56 Register Bit Definitions
84
60 WAIT STATE GENERATOR
86
61 Functional Description
86
62 Interface Signals
87
621 READY
87
622 READYO
87
623 WSC(0 – 1)
87
63 Bus Function
88
631 Wait States in Non-Pipelined Cycle
88
632 Wait States in Pipelined Cycle
89
633 Extending and Early Terminating Bus Cycle
90
64 Register Set Overview
91
65 Programming
92
66 Register Bit Definition
92
67 Application Issues
92
671 External ‘READY’ Control Logic
92
70 DRAM REFRESH CONTROLLER
94
71 Functional Description
94
72 Interface Signals
94
721 TOUT1REF
94
73 Bus Function
95
731 Arbitration
95
74 Modes of Operation
95
741 Word Size and Refresh Address Counter
95
75 Register Set Overview
96
76 Programming
96
77 Register Bit Definition
96
4


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn