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GS2994 数据表(PDF) 11 Page - Semtech Corporation

部件名 GS2994
功能描述  GS2994 Adaptive Cable Equalizer
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制造商  SEMTECH [Semtech Corporation]
网页  http://www.semtech.com
标志 SEMTECH - Semtech Corporation

GS2994 数据表(HTML) 11 Page - Semtech Corporation

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GS2994 GS2994 Adaptive Cable Equalizer
Data Sheet
53967 - 4
August 2012
11 of 20
4. Detailed Description
The GS2994 is a high-speed BiCMOS IC designed to equalize serial digital signals.
The GS2994 can equalize 3Gb/s, HD and SD serial digital signals, and will typically
equalize 140m of Belden 1694A cable at 2.97Gb/s, 220m at 1.485Gb/s and 400m at
270Mb/s. The GS2994 can be powered from a single +3.3V power supply, and is
footprint compatible with the GS2974 and GS2984 equalizers. When using 1.2V CML,
the GS2994 typically consumes approximately 167mW of power.
4.1 Serial Data Inputs
The Serial Data signal can be connected to the input pins (SDI/SDI) in either a differential
or single-ended configuration. AC-coupling of the inputs is recommended, as the SDI
and SDI inputs are internally biased at approximately 1.8V.
4.2 Cable Equalization
The input signal passes through a variable gain equalizing stage, whose frequency
response closely matches the inverse of the cable loss characteristic. In addition, the
variation of the frequency response with control voltage imitates the variation of the
inverse cable loss characteristic with cable length.
The edge energy of the equalized signal is monitored by a detector circuit which
produces an error signal corresponding to the difference between the desired edge
energy and the actual edge energy. This error signal is integrated by both an internal and
an external AGC filter capacitor providing a steady control voltage for the gain stage. As
the frequency response of the gain stage is automatically varied by the application of
negative feedback, the edge energy of the equalized signal is kept at a constant level
which is representative of the original edge energy at the transmitter. The equalized
signal is also DC-restored, effectively restoring the logic threshold of the equalized
signal to its correct level independent of shifts due to AC-coupling.


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