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GS2984 数据表(PDF) 5 Page - Gennum Corporation |
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GS2984 数据表(HTML) 5 Page - Gennum Corporation |
5 / 20 page GS2984 Adaptive Cable Equalizer Data Sheet 50985 - 3 March 2010 5 of 20 8 SQ_ADJ Analog Input Squelch Adjust. Adjusts the approximate amount of cable equalized before CD goes low. See Section 4.4 and Section 4.5. (Internal pull-down). 9CMSET Not Synchronous Input CONTROL SIGNAL INPUT levels are LVCMOS/LVTTL compatible. (3.3V Tolerant) Controls output common mode level. (Internal pull-down). See Section 4.7. 10, 11 SDO, SDO Analog Output Equalized serial digital differential output. 12 VEE_D Analog Power Most negative power supply for the digital circuitry and output buffer. Connect to GND. 13 VCC_D Analog Power Most positive power supply for the digital I/O pins of the device. Connect to +3.3V DC. 14 MUTE Not Synchronous Input CONTROL SIGNAL INPUT levels are LVCMOS/LVTTL compatible. (3.3V Tolerant) Controls output behaviour on SDO and SDO. (Internal pull-down). See Section 4.5. 15 CD Not Synchronous Output STATUS SIGNAL OUTPUT Signal levels are LVCMOS/LVTTL compatible. Indicates the presence of an input signal. See Section 4.5. 16 VCC_A Analog Power Most positive power supply for the analog circuitry of the device. Connect to +3.3V DC. – Center Pad – Power Internally bonded to VEE_A. Table 1-1: GS2984 Pin Descriptions (Continued) Pin Number Name Timing Type Description |
类似零件编号 - GS2984 |
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类似说明 - GS2984 |
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