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GMS81604K 数据表(PDF) 30 Page - Hynix Semiconductor |
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GMS81604K 数据表(HTML) 30 Page - Hynix Semiconductor |
30 / 79 page BASIC INTERVAL TIMER The GMS81604 has one 8-bit Basic Interval Timer that is free-run, can not stop. Block diagram is shown in Figure 11. The 8-bit Basic interval timer register (BITR) is incre- mented every internal count pulse which is divided by prescaler. Since prescaler has divided ratio by 16 to 2048, the count rate is 1/16 to 1/2048 of the oscillator frequency. As the count overflows from FFH to 00H, this overflow causes to generate the Basic interval timer interrupt. The BITR is interrupt request flag of Basic interval timer. Caution: All control bits of Basic interval timer are in CKCTLR register which is located at same ad - dress of BITR (address D3H ). Address D3H is read as BITR, written to CKCTLR. When write "1" to bit BTCL of CKCTLR, data register is cleared to "0" and restart to count-up. It becomes "0" after one machine cycle by hardware. ÷16 ÷32 ÷64 ÷128 ÷256 ÷512 ÷1024 ÷2048 BITR (8 BITS) BASIC INTERVAL TIMER INTERRUPT BTCL BITIF BTS[2:0] CLEAR X IN PIN PRESCALER MUX 3 8 Figure 11. Block Diagram of The Basic Interval Timer Symbol Position Name and Significance WDTON CKCTLR.5 WDTON=1, enables Watch Dog Timer operation, WDTON=0, operates as a 6-bit timer ENPCK CKCTLR.4 Enable Peripheral clock. BTCL CKCTLR.3 BTCL is set to "1", BITR is cleared. BTCL becomes "0" automatically after one machine cycle, and starts counting. BASIC INTERVAL TIMER CLOCK SELECTION BTS2 BTS1 BTS0 Prescale value 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 16 32 64 128 256 512 1024 2048 WDTON - ENPCK BTCL BTS1 BTS2 BTS0 - CKCTLR ADDRESS: D3H RESET VALUE: --010111 Figure 12. CKCTLR: Control Clock Register GMS81604/08 LG Semicon 26 |
类似零件编号 - GMS81604K |
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类似说明 - GMS81604K |
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