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GMS81608TK 数据表(PDF) 32 Page - Hynix Semiconductor |
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GMS81608TK 数据表(HTML) 32 Page - Hynix Semiconductor |
32 / 79 page TIMER 3 TIMER 2 T3SL1 T3SL0 INPUT CLOCK T2SL1 T2SL0 INPUT CLOCK 0 0 1 1 0 1 0 1 16-BIT TIMER MODE (NOTE 1) 8-BIT TIMER, ÷ 4 ←PRESCALER 8-BIT TIMER, ÷ 16 8-BIT TIMER, ÷ 64 0 0 1 1 0 1 0 1 Timer or Counter select ÷ 4 ← PRESCALER ÷ 16 ÷ 64 LSB MSB T3SL1 T3ST T3SL0 T2ST T2SL1 T2CN T2SL0 CAP2 TM2 Capture mode selection flag, When set, timer operate as one 16-bit timer combine two 8-bit timers. See Figure 21 and Figure 22. CAP2 When set, Timer 3 count register is cleared and start again. When cleared, stop the counting. T3ST Start/Stop control for Timer 2. A logic 1 starts the timer. T2CN When set, Timer 2 count register is cleared and start again. When cleared, stop the counting. T2ST NOTE: If this mode selected, the Timer 2 and Timer 3 are used as a 16-bit timer mode. The Timer 3 is engaged to the Timer 2. The source clock is selected by bits T2SL1 and T2SL0. TIMER 3 TIMER 2 ADDRESS: E3H RESET VALUE: 00H Figure 14. TM2: Timer 2, Timer 3 Mode Register LSB MSB TDR0 TDR1 TDR2 TDR3 ADDRESS: E4H RESET VALUE: 00H ADDRESS: E5H RESET VALUE: 00H ADDRESS: E6H RESET VALUE: 00H ADDRESS: E7H RESET VALUE: 00H Figure 15. TDRx : Timer x Data Register GMS81604/08 LG Semicon 28 |
类似零件编号 - GMS81608TK |
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类似说明 - GMS81608TK |
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