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GMS81608T 数据表(PDF) 35 Page - Hynix Semiconductor

部件名 GMS81608T
功能描述  LG Semicon 8-bit Microcontrollers
Download  79 Pages
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制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

GMS81608T 数据表(HTML) 35 Page - Hynix Semiconductor

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16-bit Timer/Counter Mode
The Timer register is being run with all 16 bits. A 16-bit
timer/counter register T0, T1 are incremented from
0000H until it matches TDR0, TDR1 and then resets
to 0000H. The match output generates Timer 0 inter-
rupt.
The clock source of the Timer 0 is selected either
internal or external clock by bit T0SL1, T0SL0.
Even if the Timer 0 (including the Timer 1) is used as
a 16-bit timer, the Timer 2 and Timer 3 can still be used
as either two 8-bit timer or one 16-bit timer by setting
the TM2. Reversely, even if the Timer 2 (including the
Timer 3) is used as a 16-bit timer, the Timer 0 and
Timer 1 can still be used as 8-bit timer independently.
TM0
CAP0
T1ST
T1SL1
T1SL0
T0ST
T0CN
T0SL1
T0SL0
0
X
0
0
X
X
X
X
MSB
LSB
÷ 4
÷ 16
÷ 64
TDR0
(8-BITS)
TIMER 0
INTERRUPT
T0SL[1:0]
XIN PIN
EC0 PIN
T0
(8-BITS)
T0CN
COMPARATOR
T0ST
CLEAR
T0IF
MUX
PRESCALER
TIMER 0
TDR1
(8-BITS)
T1
(8-BITS)
THIS FIGURE IS A EXAMPLE OF THE TIMER 0 AND
TIMER 1.
IN THE TIMER 2, EACH REGISTERS AND FLAGS MAY BE
CHANGED CORRESPONDINGLY.
(NOT TIMER 1 INTERRUPT)
EDGE DETECTOR
0: Stop
1: Clear and Start
ADDRESS: E2H
RESET VALUE: 00H
HIGHER
LOWER
(+TIMER1)
1
0
DO NOT CARE
Figure 19. 16-bit Timer/Counter Mode
TDR0
MATCH
00H
TIMER
INTERRUPT
TIME
CLEAR
CLEAR
CLEAR
OCCUR INTERRUPT
OCCUR INTERRUPT
MATCH
Clear and Start
Stop
Stop
TxST
TxCN
Restart
Count Up
HIGH
LOW
HIGH
LOW
Figure 20. Timer Count Operation
LG Semicon
GMS81604/08
31


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