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MC-4R96CPE6C-745 数据表(PDF) 5 Page - NEC

部件名 MC-4R96CPE6C-745
功能描述  Direct Rambus DRAM RIMM Module 96M-BYTE 48M-WORD x 16-BIT
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制造商  NEC [NEC]
网页  http://www.nec.com/
标志 NEC - NEC

MC-4R96CPE6C-745 数据表(HTML) 5 Page - NEC

  MC-4R96CPE6C-745 Datasheet HTML 1Page - NEC MC-4R96CPE6C-745 Datasheet HTML 2Page - NEC MC-4R96CPE6C-745 Datasheet HTML 3Page - NEC MC-4R96CPE6C-745 Datasheet HTML 4Page - NEC MC-4R96CPE6C-745 Datasheet HTML 5Page - NEC MC-4R96CPE6C-745 Datasheet HTML 6Page - NEC  
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Preliminary Data Sheet M14806EJ2V0DS00
5
MC-4R96CPE6C
Module Connector Pad Description
(1/2)
Signal
I/O
Type
Description
GND
Ground reference for RDRAM core and interface. 72 PCB connector pads.
LCFM
I
RSL
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
LCFMN
I
RSL
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
LCMD
I
VCMOS
Serial Command used to read from and write to the control registers. Also used
for power management.
LCOL4..LCOL0
I
RSL
Column bus. 5-bit bus containing control and address information for column
accesses.
LCTM
I
RSL
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
LCTMN
I
RSL
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
LDQA8..LDQA0
I/O
RSL
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQA8 is non-functional on modules with x16 RDRAM devices.
LDQB8..LDQB0
I/O
RSL
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQB8 is non-functional on modules with x16 RDRAM devices.
LROW2..LROW0
I
RSL
Row bus. 3-bit bus containing control and address information for row accesses.
LSCK
I
VCMOS
Serial clock input. Clock source used to read from and write to the RDRAM
control registers.
NC
These pads are not connected. These 24 connector pads are reserved for future
use.
RCFM
I
RSL
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
RCFMN
I
RSL
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
RCMD
I
VCMOS
Serial Command Input used to read from and write to the control registers. Also
used for power management.
RCOL4..RCOL0
I
RSL
Column bus. 5-bit bus containing control and address information for column
accesses.
RCTM
I
RSL
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
RCTMN
I
RSL
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
RDQA8..RDQA0
I/O
RSL
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQA8 is non-functional on modules with x16 RDRAM
devices.
RDQB8..RDQB0
I/O
RSL
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQB8 is non-functional on modules with x16 RDRAM
devices.
RROW2..RROW0
I
RSL
Row bus. 3-bit bus containing control and address information for row accesses.


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