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EP1K50 数据表(PDF) 81 Page - Altera Corporation |
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EP1K50 数据表(HTML) 81 Page - Altera Corporation |
81 / 86 page Altera Corporation 81 ACEX 1K Programmable Logic Device Family Data Sheet 13 Notes to tables: (1) All timing parameters are described in Tables 22 through 29 in this data sheet. (2) These parameters are specified by characterization. (3) This parameter is measured without the use of the ClockLock or ClockBoost circuits. (4) This parameter is measured with the use of the ClockLock or ClockBoost circuits. Power Consumption The supply power (P) for ACEX 1K devices can be calculated with the following equation: P = PINT + PIO = (ICCSTANDBY + ICCACTIVE) × VCC + PIO The ICCACTIVE value depends on the switching frequency and the application logic. This value is calculated based on the amount of current that each LE typically consumes. The PIO value, which depends on the device output load characteristics and switching frequency, can be calculated using the guidelines given in Application Note 74 (Evaluating Power for Altera Devices). 1 Compared to the rest of the device, the embedded array consumes a negligible amount of power. Therefore, the embedded array can be ignored when calculating supply current. Table 57. EP1K100 External Bidirectional Timing Parameters Notes (1), (2) Symbol Speed Grade Unit -1 -2 -3 Min Max Min Max Min Max tINSUBIDIR (3) 1.7 2.5 3.3 ns tINHBIDIR (3) 0.0 0.0 0.0 ns tINSUBIDIR (4) 2.0 2.8 – ns tINHBIDIR (4) 0.0 0.0 – ns tOUTCOBIDIR (3) 2.0 5.2 2.0 6.9 2.0 9.1 ns tXZBIDIR (3) 5.6 7.5 10.1 ns tZXBIDIR (3) 5.6 7.5 10.1 ns tOUTCOBIDIR (4) 0.5 3.0 0.5 4.6 – – ns tXZBIDIR (4) 4.6 6.5 – ns tZXBIDIR (4) 4.6 6.5 – ns |
类似零件编号 - EP1K50 |
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类似说明 - EP1K50 |
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