ADC10D040

SNAS149G – OCT 2001 – REVISED MARCH 2013

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Converter Electrical Characteristics (continued)

(1)

Units

Symbol

Parameter

Conditions

(Limits)

PD = LOW, STBY = LOW, d.c. input

267

305

mW (max)

PD = LOW, STBY = LOW, 1 MHz Input

270

mW

PD

Power Consumption

PD = LOW, STBY = HIGH

30

mW

PD = HIGH, STBY = LOW or HIGH

0.6

mW

Change in Full Scale with 3.0V to 3.6V Supply

PSRR1

Power Supply Rejection Ratio

90

dB

Change

PSRR2

Power Supply Rejection Ratio

52

dB

AC Electrical Characteristics

OS = Low (Multiplexed Mode)

(1)

Units

Symbol

Parameter

Conditions

(Limits)

Maximum Clock Frequency

45

40

MHz (min)

Minimum Clock Frequency

20

MHz

45

% (min)

Duty Cycle

50

55

% (max)

Clock

I Data

2.5

Cycles

Pipeline Delay (Latency)

Clock

Q Data

3.0

Cycles

Output Rise and Fall Times

5

ns

Offset Correction Pulse Width

10

ns (min)

Output Delay from CLK Edge to Data Valid

13

19

ns (max)

I/Q Output Delay

13

ns

I/Q to Data Skew

±200

ps

Sampling (Aperture) Delay

2.2

ns

Aperture Jitter

<10

ps (rms)

Data Valid Time

7.5

ns

Overrange Recovery Time

50

ns

1.5V to 0V

(1)

The inputs are protected as shown below. Input voltage magnitude up to 300 mV beyond the supply rails will not damage this device.

However, errors in the A/D conversion can occur if the input goes beyond the limits given in these tables.

(2)

Typical figures are at TJ = 25°C, and represent most likely parametric norms.

(3)

8

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