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EP2SGX30D 数据表(PDF) 60 Page - Altera Corporation

部件名 EP2SGX30D
功能描述  Stratix II GX Device Data Sheet
Download  326 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

EP2SGX30D 数据表(HTML) 60 Page - Altera Corporation

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Altera Corporation
Stratix II GX Device Handbook, Volume 1
October 2007
Transceivers
The dynamic reconfiguration block can dynamically reconfigure the
following PMA settings:
Pre-emphasis settings
Equalizer and DC gain settings
Voltage Output Differential (VOD) settings
The channel reconfiguration allows you to dynamically modify the data
rate, local dividers, and the functional mode of the transceiver channel.
f
Refer to the Stratix II GX Device Handbook, volume 2, for more
information.
The dynamic reconfiguration block requires an input clock between
2.5 MHz and 50 MHz. The clock for the dynamic reconfiguration block is
derived from a high-speed clock and divided down using a counter.
Individual Power Down and Reset for the Transmitter and Receiver
Stratix II GX transceivers offer a power saving advantage with their
ability to shut off functions that are not needed. The device can
individually reset the receiver and transmitter blocks and the PLLs. The
Stratix II GX device can either globally or individually power down and
reset the transceiver. Table 2–16 shows the connectivity between the reset
signals and the Stratix II GX transceiver blocks. These reset signals can be
controlled from the FPGA or pins.


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