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EPM7160E 数据表(PDF) 7 Page - Altera Corporation |
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EPM7160E 数据表(HTML) 7 Page - Altera Corporation |
7 / 66 page Altera Corporation 7 MAX 7000 Programmable Logic Device Family Data Sheet The MAX 7000 architecture includes four dedicated inputs that can be used as general-purpose inputs or as high-speed, global control signals (clock, clear, and two output enable signals) for each macrocell and I/O pin. Figure 1 shows the architecture of EPM7032, EPM7064, and EPM7096 devices. Figure 1. EPM7032, EPM7064 & EPM7096 Device Block Diagram I/O Control Block 8 to 16 I/O pins 8 to 16 8 to 16 16 36 I/O Control Block 8 to 16 8 to 16 I/O pins 36 8 to 16 16 8 to 16 8 to 16 I/O pins 36 8 to 16 16 I/O Control Block I/O Control Block 8 to 16 I/O pins 8 to 16 8 to 16 16 36 LAB A LAB B LAB C Macrocells 33 to 48 LAB D INPUT/GCLRn INPUT/OE1 INPUT/OE2 Macrocells 17 to 32 Macrocells 49 to 64 PIA INPUT/GLCK1 Macrocells 1 to 16 |
类似零件编号 - EPM7160E |
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类似说明 - EPM7160E |
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